From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E675CA2EEB for ; Thu, 12 Sep 2019 18:12:02 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 23F2B1EAF9; Thu, 12 Sep 2019 18:12:02 +0200 (CEST) Received: from mail-io1-f65.google.com (mail-io1-f65.google.com [209.85.166.65]) by dpdk.org (Postfix) with ESMTP id D81C81EA95 for ; Thu, 12 Sep 2019 18:12:00 +0200 (CEST) Received: by mail-io1-f65.google.com with SMTP id d25so56104810iob.6 for ; Thu, 12 Sep 2019 09:12:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=t+9ecsm4sAv+OM8SOEy1kGANOuQ4y2pxcM9EYDcuF08=; b=V8prLt6RbL0hyNl/SQevh9ot86gClQDIBwMvX6VqaafaGHQyvtbJyMao3WFd/LPj2D KWBlTNq2IdKSTFZT2r0ZsgirA7Z8/Jd9a7XndKaYx7QpxeRsAWFtJ7sUgyToNqbr1jtz ljzmrTqvJ0Va9zoOcbEdtx2G2F3sWnsHkWHxQM0NzD5e1S3pJDagekuJ9X/N52qn4UiW CrmPbnkXhE822NHb6K6xFrsxFh/gXM4oJPUka0DJ6cPppnXqnMSbiS5rDxbsBtONO2p/ ab7nNtqW0urwvDxOna90+dIAica5Y3nKk5O52PLQa82QXVoyjCQksGzFpPGgS5PC3oHs ugQw== X-Google-DKIM-Signature: v=1; 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charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v5 3/8] eal: add the APIs to wait until equal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Sep 12, 2019 at 4:56 PM Gavin Hu wrote: > > The rte_wait_until_equalxx APIs abstract the functionality of 'polling > for a memory location to become equal to a given value'. > > Signed-off-by: Gavin Hu > Reviewed-by: Ruifeng Wang > Reviewed-by: Steve Capper > Reviewed-by: Ola Liljedahl > Reviewed-by: Honnappa Nagarahalli > Reviewed-by: Phil Yang > Acked-by: Pavan Nikhilesh > --- > .../common/include/arch/arm/rte_pause_64.h | 30 +++++++ > lib/librte_eal/common/include/generic/rte_pause.h | 98 +++++++++++++++++++++- > 2 files changed, 127 insertions(+), 1 deletion(-) > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > index 93895d3..dabde17 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_pause_64.h > @@ -1,5 +1,6 @@ > /* SPDX-License-Identifier: BSD-3-Clause > * Copyright(c) 2017 Cavium, Inc > + * Copyright(c) 2019 Arm Limited > */ > > #ifndef _RTE_PAUSE_ARM64_H_ > @@ -17,6 +18,35 @@ static inline void rte_pause(void) > asm volatile("yield" ::: "memory"); > } > > +#ifdef RTE_ARM_USE_WFE > +#define __WAIT_UNTIL_EQUAL(name, asm_op, wide, type) \ > +static __rte_always_inline void \ > +rte_wait_until_equal_##name(volatile type * addr, type expected) \ > +{ \ > + type tmp; \ > + asm volatile( \ > + #asm_op " %" #wide "[tmp], %[addr]\n" \ > + "cmp %" #wide "[tmp], %" #wide "[expected]\n" \ > + "b.eq 2f\n" \ > + "sevl\n" \ > + "1: wfe\n" \ > + #asm_op " %" #wide "[tmp], %[addr]\n" \ > + "cmp %" #wide "[tmp], %" #wide "[expected]\n" \ > + "bne 1b\n" \ > + "2:\n" \ > + : [tmp] "=&r" (tmp) \ > + : [addr] "Q"(*addr), [expected] "r"(expected) \ > + : "cc", "memory"); \ > +} > +/* Wait for *addr to be updated with expected value */ > +__WAIT_UNTIL_EQUAL(relaxed_16, ldxrh, w, uint16_t) > +__WAIT_UNTIL_EQUAL(acquire_16, ldaxrh, w, uint16_t) > +__WAIT_UNTIL_EQUAL(relaxed_32, ldxr, w, uint32_t) > +__WAIT_UNTIL_EQUAL(acquire_32, ldaxr, w, uint32_t) > +__WAIT_UNTIL_EQUAL(relaxed_64, ldxr, x, uint64_t) > +__WAIT_UNTIL_EQUAL(acquire_64, ldaxr, x, uint64_t) > +#endif Looks good. > + > #ifdef __cplusplus > } > #endif > diff --git a/lib/librte_eal/common/include/generic/rte_pause.h b/lib/librte_eal/common/include/generic/rte_pause.h > index 52bd4db..dfa6a53 100644 > --- a/lib/librte_eal/common/include/generic/rte_pause.h > +++ b/lib/librte_eal/common/include/generic/rte_pause.h > @@ -1,10 +1,10 @@ > /* SPDX-License-Identifier: BSD-3-Clause > * Copyright(c) 2017 Cavium, Inc > + * Copyright(c) 2019 Arm Limited > */ > > #ifndef _RTE_PAUSE_H_ > #define _RTE_PAUSE_H_ > - Unwanted change. > /** > * @file > * > @@ -12,6 +12,10 @@ > * > */ > > +#include > +#include > +#include > + > /** > * Pause CPU execution for a short while > * > @@ -20,4 +24,96 @@ > */ > static inline void rte_pause(void); > > +/** > + * Wait for *addr to be updated with expected value IMO, We need to mention relaxed attribute also in the comment. > + * > + * @param addr > + * A pointer to the memory location. > + * @param expected > + * An expected value to be in the memory location. > + */ > +__rte_always_inline > +static void > +rte_wait_until_equal_relaxed_16(volatile uint16_t *addr, uint16_t expected); > + > +/** > + * Wait for *addr to be updated with expected value > + * > + * @param addr > + * A pointer to the memory location. > + * @param expected > + * An expected value to be in the memory location. > + */ > +__rte_always_inline > +static void > +rte_wait_until_equal_acquire_64(volatile uint64_t *addr, uint64_t expected); > + > +#if !defined(RTE_ARM_USE_WFE) Looks like there is a side effect as meson's build/rte_build_config.h comes as below #define RTE_ARM_USE_WFE 0 So actually it is defined. > +#define __WAIT_UNTIL_EQUAL(op_name, size, type, memorder) \ > +__rte_always_inline \ > +static void \ > +rte_wait_until_equal_##op_name##_##size(volatile type *addr, \ > + type expected) \ > +{ \ > + while (__atomic_load_n(addr, memorder) != expected) \ > + rte_pause(); \ > +} > + > +/* Wait for *addr to be updated with expected value */ > +__WAIT_UNTIL_EQUAL(relaxed, 16, uint16_t, __ATOMIC_RELAXED) > +__WAIT_UNTIL_EQUAL(acquire, 16, uint16_t, __ATOMIC_ACQUIRE) > +__WAIT_UNTIL_EQUAL(relaxed, 32, uint32_t, __ATOMIC_RELAXED) > +__WAIT_UNTIL_EQUAL(acquire, 32, uint32_t, __ATOMIC_ACQUIRE) > +__WAIT_UNTIL_EQUAL(relaxed, 64, uint64_t, __ATOMIC_RELAXED) > +__WAIT_UNTIL_EQUAL(acquire, 64, uint64_t, __ATOMIC_ACQUIRE) > +#endif /* RTE_ARM_USE_WFE */ > + > #endif /* _RTE_PAUSE_H_ */ > -- > 2.7.4 >