From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3C95A00C2; Wed, 23 Feb 2022 17:52:14 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 46C1540E5A; Wed, 23 Feb 2022 17:52:14 +0100 (CET) Received: from mail-il1-f180.google.com (mail-il1-f180.google.com [209.85.166.180]) by mails.dpdk.org (Postfix) with ESMTP id 195EA40DF6 for ; Wed, 23 Feb 2022 17:52:13 +0100 (CET) Received: by mail-il1-f180.google.com with SMTP id y5so3459957ill.13 for ; Wed, 23 Feb 2022 08:52:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8Tevk/RYF5kgSJKjv5y8lhodkOeib2xs4xeJDGeGxrk=; b=VRr86uQ5s6opCrkmVP2r6V8xkmdZD0W6AVYlxj8woujqVzpvriTv9kq7vcOdUSO021 y8Y4WSyyQiiyTHqO0cBNkhwoOUx7AccZjKKU791jmlw+0l+Nn/y8T1dfVkrRjNyK2VpH XrO3bLs8AggmUc+vRNoy9byj6pZzcBXD28rmqrilbqyZznWBa8DzIjcd83TF7u/SNTWW H5RBiNrPfJAApSv9ihHsZNsRU7zdoMuspPZYl5H3ddnjexL/lF8ApI1xG1O8FLy9Fyb/ 9UVR3v32Ko2KjenWfEs2/W62B0mot7Wz4ywuxPSeM2wg+g6u3szIGXTIcHxP57MeMUkp fRCQ== X-Google-DKIM-Signature: v=1; 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charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, Feb 23, 2022 at 5:58 PM Akhil Goyal wrote: > > From: Vidya Sagar Velumuri > > When reassembly is enabled by application, set corresponding > flags in SA during creation. > > Provide roc API to configure reassembly unit with active and zombie limits > and step size > > Signed-off-by: Vidya Sagar Velumuri > --- > drivers/common/cnxk/cnxk_security.c | 10 ++++++++++ > drivers/common/cnxk/roc_nix_inl.c | 23 +++++++++++++++++++++++ > drivers/common/cnxk/roc_nix_inl.h | 7 +++++++ > drivers/common/cnxk/version.map | 1 + > 4 files changed, 41 insertions(+) > > diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c > index d6006d3176..ec808c0033 100644 > --- a/drivers/common/cnxk/cnxk_security.c > +++ b/drivers/common/cnxk/cnxk_security.c > @@ -339,6 +339,16 @@ cnxk_ot_ipsec_inb_sa_fill(struct roc_ot_ipsec_inb_sa *sa, > if (rc) > return rc; > > + /* Default options for pkt_out and pkt_fmt are with > + * second pass meta and no defrag. > + */ > + sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META; > + sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG; > + sa->w0.s.pkind = ROC_IE_OT_CPT_PKIND; > + > + if (ipsec_xfrm->options.ip_reassembly_en) > + sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_HW_BASED_DEFRAG; > + > /* ESN */ > sa->w2.s.esn_en = !!ipsec_xfrm->options.esn; > if (ipsec_xfrm->options.udp_encap) { > diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c > index 7bf89a44c1..9db97b65df 100644 > --- a/drivers/common/cnxk/roc_nix_inl.c > +++ b/drivers/common/cnxk/roc_nix_inl.c > @@ -231,6 +231,29 @@ roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix, bool inb_inl_dev, uint32_t spi) > return (sa_base + ((spi & mask) * sz)); > } > > +int > +roc_nix_reassembly_configure(uint32_t max_wait_time, uint16_t max_frags) > +{ > + struct idev_cfg *idev = idev_get_cfg(); > + struct roc_cpt *roc_cpt; > + struct roc_cpt_rxc_time_cfg cfg; > + > + (void)max_frags; Use PLT_SET_USED > + roc_cpt = idev->cpt; > + if (!roc_cpt) { > + plt_err("Cannot support inline inbound, cryptodev not probed"); > + return -ENOTSUP; > + } > + > + cfg.step = (max_wait_time * 1000 / ROC_NIX_INL_REAS_ACTIVE_LIMIT); > + cfg.zombie_limit = ROC_NIX_INL_REAS_ZOMBIE_LIMIT; > + cfg.zombie_thres = ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD; > + cfg.active_limit = ROC_NIX_INL_REAS_ACTIVE_LIMIT; > + cfg.active_thres = ROC_NIX_INL_REAS_ACTIVE_THRESHOLD; > + > + return roc_cpt_rxc_time_cfg(roc_cpt, &cfg); > +} > + > int > roc_nix_inl_inb_init(struct roc_nix *roc_nix) > { > diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h > index 5eb1a81471..45d349acf4 100644 > --- a/drivers/common/cnxk/roc_nix_inl.h > +++ b/drivers/common/cnxk/roc_nix_inl.h > @@ -43,6 +43,11 @@ > /* Alignment of SA Base */ > #define ROC_NIX_INL_SA_BASE_ALIGN BIT_ULL(16) > > +#define ROC_NIX_INL_REAS_ACTIVE_LIMIT 0xFFF > +#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10 > +#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF > +#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10 > + > static inline struct roc_onf_ipsec_inb_sa * > roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx) > { > @@ -152,6 +157,8 @@ struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(void); > int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix, > uint32_t tag_const, uint8_t tt); > uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void); > +int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time, > + uint16_t max_frags); > > /* NIX Inline Outbound API */ > int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix); > diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map > index dbede4aeed..2e8da4c2a7 100644 > --- a/drivers/common/cnxk/version.map > +++ b/drivers/common/cnxk/version.map > @@ -206,6 +206,7 @@ INTERNAL { > roc_nix_ptp_tx_ena_dis; > roc_nix_queues_ctx_dump; > roc_nix_ras_intr_ena_dis; > + roc_nix_reassembly_configure; > roc_nix_register_cq_irqs; > roc_nix_register_queue_irqs; > roc_nix_rq_dump; > -- > 2.25.1 >