From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6BC09A04A6; Mon, 24 Jan 2022 10:08:10 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4CF9C427AD; Mon, 24 Jan 2022 10:08:10 +0100 (CET) Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) by mails.dpdk.org (Postfix) with ESMTP id 862E540040 for ; Mon, 24 Jan 2022 10:08:09 +0100 (CET) Received: by mail-io1-f50.google.com with SMTP id d188so4296012iof.7 for ; Mon, 24 Jan 2022 01:08:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=CLFKIvAgRDflAfhKiiYQKH1oZu5vib61yQgeFcf22lc=; b=idCo4JjtHb8aps5YQtYLGHLv7aastppfanEdqPrPvYu9rrraWBKxf7oYFU0UagU+zu xl8k6KLMSFbpBuPrediDVQ8TZODykziLj+hQFdjLF+bqw7rwLL0FrdaavGcjtfylD7hN iiEyEEvFlkpVPnaGSDzhwy1r4K3sJ+DCpvc06FEq6+giUCHm31rU6TKO+NUi+/WLWUDr oxL3UDUW+tgmnbLbN886UXqFwgR9Q5NVW/Hp1gYsi7o3Z+bA8a/hUmXsjynAzqi7XhR8 kTLs8vf117v0pRbuiXmCLZAK4HMQkyjOD9uR42b7MWI+5dfIj6rHvSzZLFGnBik7yUXL Q3cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=CLFKIvAgRDflAfhKiiYQKH1oZu5vib61yQgeFcf22lc=; b=glcDkO64Ad7spdSgbSVDiOgLpIjRa1p9T2tgufwyXvDzf1FlP1JRWBmj9nIJlTMbLh 4MpNzG4IzT2dfPbsHnRvmoLtiX4lZkfn9aOBxV0f7eIrQviK0bvIG1vvrWW1NeJ+E9W6 7qH77XKNqMf3jmzfAQJIj9KsTe82IHopIpY0SHLe56oKPfiNgj0R3TIO/pE/FyMMsEq2 VCuKz94Fi/x91IphWSpD4Lt3XYr2zauxVLjnd/RDzIOgNNtYxKM6pyUjI2PhwAO5WBBk Xzlv8TTK5iYPorzDaW1rBL8XM1WM9D9mVV8aac8r2Y9wyY7NI7duDO28cyNB7JSo2g/e v2/A== X-Gm-Message-State: AOAM533SlGhAddXHCPpClxaDrJogvZH6eJUpDiqNl3wZ7NErstHQBWEO EPuT2xzJJI2T41Fg4sihSyKW4DInn7NO2SYMjAw= X-Google-Smtp-Source: ABdhPJxO6IlD68Q1mKJaxjFWVR9yBLFbtHDvlMQVLpM0955BBzCpmxTzH5mbUTEgf2OD4x1cWQM2+0yTlBDPph+N8Jw= X-Received: by 2002:a02:9147:: with SMTP id b7mr6575693jag.266.1643015288789; Mon, 24 Jan 2022 01:08:08 -0800 (PST) MIME-Version: 1.0 References: <5919b346b947e8a9968e974dfdede7d3ae8c0eff.1640273981.git.sthotton@marvell.com> In-Reply-To: <5919b346b947e8a9968e974dfdede7d3ae8c0eff.1640273981.git.sthotton@marvell.com> From: Jerin Jacob Date: Mon, 24 Jan 2022 14:37:42 +0530 Message-ID: Subject: Re: [PATCH] event/cnxk: add timer adapter periodic mode support To: Shijith Thotton Cc: dpdk-dev , Pavan Nikhilesh , Jerin Jacob Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Dec 23, 2021 at 9:36 PM Shijith Thotton wrote: > > Add support for event timer adapter periodic mode capability. > > Signed-off-by: Shijith Thotton Acked-by: Jerin Jacob Applied to dpdk-next-net-eventdev/for-main. Thanks > --- > Depends-on: series-20928 (event/cnxk: update min interval calculation) > > drivers/event/cnxk/cnxk_tim_evdev.c | 21 +++++++++++++++++---- > drivers/event/cnxk/cnxk_tim_evdev.h | 1 + > 2 files changed, 18 insertions(+), 4 deletions(-) > > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c > index 5d52a39752..4d22ac6ac3 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.c > +++ b/drivers/event/cnxk/cnxk_tim_evdev.c > @@ -58,7 +58,7 @@ cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring, > } > tim_ring->aura = roc_npa_aura_handle_to_aura( > tim_ring->chunk_pool->pool_id); > - tim_ring->ena_dfb = 0; > + tim_ring->ena_dfb = tim_ring->ena_periodic ? 1 : 0; > } else { > tim_ring->chunk_pool = rte_mempool_create( > pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz, > @@ -112,7 +112,9 @@ cnxk_tim_ring_info_get(const struct rte_event_timer_adapter *adptr, > struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv; > > adptr_info->max_tmo_ns = tim_ring->max_tout; > - adptr_info->min_resolution_ns = tim_ring->tck_nsec; > + adptr_info->min_resolution_ns = tim_ring->ena_periodic ? > + tim_ring->max_tout : > + tim_ring->tck_nsec; > rte_memcpy(&adptr_info->conf, &adptr->data->conf, > sizeof(struct rte_event_timer_adapter_conf)); > } > @@ -237,6 +239,12 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > goto tim_hw_free; > } > > + if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) { > + /* Use 2 buckets to avoid contention */ > + rcfg->timer_tick_ns /= 2; > + tim_ring->ena_periodic = 1; > + } > + > if (rcfg->timer_tick_ns < min_intvl_ns) { > if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES) { > rcfg->timer_tick_ns = min_intvl_ns; > @@ -246,6 +254,9 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > } > } > > + if (tim_ring->ena_periodic) > + rcfg->max_tmo_ns = rcfg->timer_tick_ns * 2; > + > if (rcfg->timer_tick_ns > rcfg->max_tmo_ns) { > plt_err("Max timeout to too high"); > rc = -ERANGE; > @@ -322,7 +333,8 @@ cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr) > if (rc < 0) > goto tim_bkt_free; > > - rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, 0, 0, > + rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src, > + tim_ring->ena_periodic, tim_ring->ena_dfb, > tim_ring->nb_bkts, tim_ring->chunk_sz, > tim_ring->tck_int, tim_ring->tck_nsec, clk_freq); > if (rc < 0) { > @@ -493,7 +505,8 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, > > /* Store evdev pointer for later use. */ > dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev; > - *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT; > + *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT | > + RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC; > *ops = &cnxk_tim_ops; > > return 0; > diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h > index 6b5342cc34..91a90ee2ce 100644 > --- a/drivers/event/cnxk/cnxk_tim_evdev.h > +++ b/drivers/event/cnxk/cnxk_tim_evdev.h > @@ -135,6 +135,7 @@ struct cnxk_tim_ring { > uint8_t enable_stats; > uint8_t disable_npa; > uint8_t ena_dfb; > + uint8_t ena_periodic; > uint16_t ring_id; > uint32_t aura; > uint64_t nb_timers; > -- > 2.25.1 >