From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A9804A04B0; Sun, 18 Oct 2020 10:59:54 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 11E8CC928; Sun, 18 Oct 2020 10:59:52 +0200 (CEST) Received: from mail-io1-f65.google.com (mail-io1-f65.google.com [209.85.166.65]) by dpdk.org (Postfix) with ESMTP id 210B0BB00 for ; Sun, 18 Oct 2020 10:59:50 +0200 (CEST) Received: by mail-io1-f65.google.com with SMTP id y20so9435692iod.5 for ; Sun, 18 Oct 2020 01:59:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=QPtUw2mDMw3UZ/Z4qE4E/th0DT7hu4DxRdHN16cqE/M=; b=WmQO8a2lo1jlMDh2XSELmPbCLOpWFf2BkrOxewYez1pP9isQQwlDxygxJqdBeeuQWQ tvFyAvZR7/Lu8gEUPupevacI9q0BHo6pPcjTQXVYk8YzbbnemIGQsgG4lOGn72LcWhE+ 3LzC2OsQk/GhKXM8GdaiTUGL9rBRCvH10HolbH/HSu3hBnFI6kMF0NqxVz2rWAh6euwm z2FmsS5E6nrq12LiAWIUCVRSChuZ3chkklJ7OKnV7uYWyxxWB5oX+hQM6hNZy8zJauZp bbk54VtkOZH2D2iYhkC/rpv0TgKX7z2wl3ZQ+rySt/bU9CeOfyW6/UFA4mDBPRDbvtYG VPDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=QPtUw2mDMw3UZ/Z4qE4E/th0DT7hu4DxRdHN16cqE/M=; b=HbYeLzlK95QhcudTend82aEdk6RkieAFcwHAOsATENpjnOxmV50z1yXTbaZOpdqwEx 76dB9YIWatXdmKA9qaK2VxDPyoRpaEhHDQKFfRcM+PhMXLiMCt64UUZYetNsOXa+z394 PJfHeiTKr44s7zE2EzjSXFz9M1ymv55s/89CBDPundDk/rdi20yqMHkzSz0Exesz+CX5 nA1YDah8PGJGQkEN2HB4sIF2epeWSmrwTEuv+qZ72L8mXJ8L+1vAGTDTpGoM8LrC81kA X8XP4Qt1BfxcoSpy+CLQFKRf3txG89/chTYLSbpgSk3XJFLCIP8+QvPCMnJ6VEoUcw4y spdw== X-Gm-Message-State: AOAM533tQ3PTdhXonp0/sBnvNhBfsc/VbNCBxnfYnju0PPXzW/pZRAYP 3+nFVsllJgakLGUZkQAY7ulEg5TzlU4Q/O0I//g= X-Google-Smtp-Source: ABdhPJwOn24zQiKAZLv1z1Ma/eQzYkJrIfi3tjqeag5em6EhfXXcf8rljAHAMCuFhivx3l1wQD4vi5cDylf1+WC78h4= X-Received: by 2002:a02:7:: with SMTP id 7mr7878544jaa.112.1603011588489; Sun, 18 Oct 2020 01:59:48 -0700 (PDT) MIME-Version: 1.0 References: <1599855987-25976-2-git-send-email-timothy.mcdaniel@intel.com> <1602958879-8558-1-git-send-email-timothy.mcdaniel@intel.com> <1602958879-8558-6-git-send-email-timothy.mcdaniel@intel.com> In-Reply-To: <1602958879-8558-6-git-send-email-timothy.mcdaniel@intel.com> From: Jerin Jacob Date: Sun, 18 Oct 2020 14:29:32 +0530 Message-ID: To: Timothy McDaniel Cc: dpdk-dev , Erik Gabriel Carrillo , Gage Eads , "Van Haaren, Harry" , Jerin Jacob Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v2 05/22] event/dlb2: add inline functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Sat, Oct 17, 2020 at 11:50 PM Timothy McDaniel wrote: > > Add miscellaneous inline functions that may be called > from multiple files. These functions include inline > assembly of new x86 instructions, such as movdir64b, > since they are not available as builtin functions in > the minimum supported GCC version. > > Signed-off-by: Timothy McDaniel > Reviewed-by: Gage Eads > --- > drivers/event/dlb2/dlb2_inline_fns.h | 81 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 drivers/event/dlb2/dlb2_inline_fns.h > > diff --git a/drivers/event/dlb2/dlb2_inline_fns.h b/drivers/event/dlb2/dlb2_inline_fns.h > new file mode 100644 > index 0000000..9c3c36f > --- /dev/null > +++ b/drivers/event/dlb2/dlb2_inline_fns.h > @@ -0,0 +1,81 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2016-2020 Intel Corporation > + */ > + > +#ifndef _DLB2_INLINE_FNS_H_ > +#define _DLB2_INLINE_FNS_H_ > + > +/* Inline functions required in more than one source file. */ > + > +static inline struct dlb2_eventdev * > +dlb2_pmd_priv(const struct rte_eventdev *eventdev) > +{ > + return eventdev->data->dev_private; > +} > + > +static inline void > +dlb2_umonitor(volatile void *addr) > +{ > + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7\t\n" > + : > + : "D" (addr)); > +} > + > +static inline void > +dlb2_umwait(int state, uint64_t timeout) > +{ > + uint32_t eax = timeout & UINT32_MAX; > + uint32_t edx = timeout >> 32; > + > + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7\t\n" > + : > + : "D" (state), "a" (eax), "d" (edx)); > +} > + Please change this instruction to use new rte public API once it gets merged. > +static inline void > +dlb2_movntdq(void *qe4, void *pp_addr) > +{ > + /* Move entire 64B cache line of QEs, 128 bits (16B) at a time. */ > + long long *_qe = (long long *)qe4; > + __v2di src_data0 = (__v2di){_qe[0], _qe[1]}; > + __v2di src_data1 = (__v2di){_qe[2], _qe[3]}; > + __v2di src_data2 = (__v2di){_qe[4], _qe[5]}; > + __v2di src_data3 = (__v2di){_qe[6], _qe[7]}; > + > + __builtin_ia32_movntdq((__v2di *)pp_addr + 0, (__v2di)src_data0); > + rte_wmb(); > + __builtin_ia32_movntdq((__v2di *)pp_addr + 1, (__v2di)src_data1); > + rte_wmb(); > + __builtin_ia32_movntdq((__v2di *)pp_addr + 2, (__v2di)src_data2); > + rte_wmb(); > + __builtin_ia32_movntdq((__v2di *)pp_addr + 3, (__v2di)src_data3); > + rte_wmb(); > +} > + > +static inline void > +dlb2_movntdq_single(void *qe4, void *pp_addr) > +{ > + long long *_qe = (long long *)qe4; > + __v2di src_data0 = (__v2di){_qe[0], _qe[1]}; > + > + __builtin_ia32_movntdq((__v2di *)pp_addr, (__v2di)src_data0); > +} > + > +static inline void > +dlb2_cldemote(void *addr) > +{ > + /* Load addr into RSI, then demote the cache line of the address > + * contained in that register. > + */ > + asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (addr)); > +} > + > +static inline void > +dlb2_movdir64b(void *qe4, void *pp_addr) > +{ > + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" > + : > + : "a" (pp_addr), "d" (qe4)); > +} > + > +#endif /* _DLB2_INLINE_FNS_H_ */ > -- > 2.6.4 >