From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 85CE842BE4; Tue, 30 May 2023 18:52:08 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 17640410EE; Tue, 30 May 2023 18:52:08 +0200 (CEST) Received: from mail-vs1-f44.google.com (mail-vs1-f44.google.com [209.85.217.44]) by mails.dpdk.org (Postfix) with ESMTP id 7AA85410DD for ; Tue, 30 May 2023 18:52:07 +0200 (CEST) Received: by mail-vs1-f44.google.com with SMTP id ada2fe7eead31-4393c074161so1509662137.2 for ; Tue, 30 May 2023 09:52:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1685465527; x=1688057527; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=5teuMV6i+GYEjv3f4BIIoty0QFib566rqYytYarQnsM=; b=dQ1NnC314hZhwCVAGRCiv3HN74sfaEWvcEv5wbqzRhY8DsIZeDEqblg+bk3mmCRCgl WMfIPCy+JASrjxDj1a1YxsT+VDgLWG0Fp2L7XniEFqSWAcvMc7Rc6cSKoPB/KY27sSm3 4HOHvLe35dObLkeTfXKotbHc/bZYeYnHssoP6w3+mECDyJl0QtItFqNphAYB4u8J+cYj e1N77Urwa3Y2K8moQGa/jC43bZMC49v3A/QQWcGHFVrPvOHvqd1aAEy+Uh3KJFKUFp3+ Q1DiqCNel5b+/kyMet8eYmAhTD3Wx6zM6pO2xT5gxjI5l1/MC/PaHRlc+YFCPUJlO3a6 ss/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685465527; x=1688057527; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5teuMV6i+GYEjv3f4BIIoty0QFib566rqYytYarQnsM=; b=M6bcLLI4shtv39SlwvdXinjfUgefRe6Ndou6PdB2V3+5ww2Q7WCluGBxZqTkkg/TIW iOQmWUeuuzG78RYyKxwx4p95bskJZCbs+uv1nV43ON3aq8fiDy40Q+CcD5qfCS4ihNK9 swwdz1nBFS2oKr3sqGDPmGoOgA4VsZsmPV9HjTOoLyZActSHIK9pYvDIbeWPnABfbKRU 7GD2z3xU+h46Up4eOjpPxg+DCLIL49PXZbbrPCnwSQbPGdbYJS2bANl9vNSqqMdjkS4s tSMRCPPwfuqX3VlFlV0JWAAqQTO+BaEz+O69xFO5K28/cVG3AS2BXvBIMzIDaENMC3r3 G2CA== X-Gm-Message-State: AC+VfDxlGDb4tVqqyOx8o+q7k7PqrGvb9icW72Sc2IQwrXyShFAJrldd vjzrGjbPosrl4hBIxE9Wdq2bp9JWRLwfyncd6OI= X-Google-Smtp-Source: ACHHUZ61MIEVxSEu2qoVvxI1MOHeZMQ5uE014B2FuH24y8Ca5wHb65MtfuFC9S80qGXA24kj47d0mN1DUAUhWRjts4k= X-Received: by 2002:a05:6102:300d:b0:436:52e1:40dc with SMTP id s13-20020a056102300d00b0043652e140dcmr1016922vsa.14.1685465526729; Tue, 30 May 2023 09:52:06 -0700 (PDT) MIME-Version: 1.0 References: <20230526134507.885354-1-asekhar@marvell.com> <20230530091251.1040406-1-asekhar@marvell.com> In-Reply-To: <20230530091251.1040406-1-asekhar@marvell.com> From: Jerin Jacob Date: Tue, 30 May 2023 22:21:40 +0530 Message-ID: Subject: Re: [PATCH v3] common/cnxk: add new APIs for batch operations To: Ashwin Sekhar T K Cc: dev@dpdk.org, Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , jerinj@marvell.com, pbhagavatula@marvell.com, psatheesh@marvell.com, anoobj@marvell.com, gakhil@marvell.com, hkalra@marvell.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, May 30, 2023 at 2:43=E2=80=AFPM Ashwin Sekhar T K wrote: > > Add new APIs for counting and extracting allocated objects > from a single cache line in the batch alloc memory. > > Signed-off-by: Ashwin Sekhar T K Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_npa.h | 78 ++++++++++++++++++++++++++++++----- > 1 file changed, 67 insertions(+), 11 deletions(-) > > diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.= h > index e1e164499e..4ad5f044b5 100644 > --- a/drivers/common/cnxk/roc_npa.h > +++ b/drivers/common/cnxk/roc_npa.h > @@ -209,7 +209,6 @@ roc_npa_aura_batch_alloc_issue(uint64_t aura_handle, = uint64_t *buf, > unsigned int num, const int dis_wait, > const int drop) > { > - unsigned int i; > int64_t *addr; > uint64_t res; > union { > @@ -220,10 +219,6 @@ roc_npa_aura_batch_alloc_issue(uint64_t aura_handle,= uint64_t *buf, > if (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS) > return -1; > > - /* Zero first word of every cache line */ > - for (i =3D 0; i < num; i +=3D (ROC_ALIGN / sizeof(uint64_t))) > - buf[i] =3D 0; > - > addr =3D (int64_t *)(roc_npa_aura_handle_to_base(aura_handle) + > NPA_LF_AURA_BATCH_ALLOC); > cmp.u =3D 0; > @@ -240,6 +235,9 @@ roc_npa_aura_batch_alloc_issue(uint64_t aura_handle, = uint64_t *buf, > return 0; > } > > +/* > + * Wait for a batch alloc operation on a cache line to complete. > + */ > static inline void > roc_npa_batch_alloc_wait(uint64_t *cache_line, unsigned int wait_us) > { > @@ -255,6 +253,23 @@ roc_npa_batch_alloc_wait(uint64_t *cache_line, unsig= ned int wait_us) > break; > } > > +/* > + * Count the number of pointers in a single batch alloc cache line. > + */ > +static inline unsigned int > +roc_npa_aura_batch_alloc_count_line(uint64_t *line, unsigned int wait_us= ) > +{ > + struct npa_batch_alloc_status_s *status; > + > + status =3D (struct npa_batch_alloc_status_s *)line; > + roc_npa_batch_alloc_wait(line, wait_us); > + > + return status->count; > +} > + > +/* > + * Count the number of pointers in a sequence of batch alloc cache lines= . > + */ > static inline unsigned int > roc_npa_aura_batch_alloc_count(uint64_t *aligned_buf, unsigned int num, > unsigned int wait_us) > @@ -279,6 +294,40 @@ roc_npa_aura_batch_alloc_count(uint64_t *aligned_buf= , unsigned int num, > return count; > } > > +/* > + * Extract allocated pointers from a single batch alloc cache line. This= api > + * only extracts the required number of pointers from the cache line and= it > + * adjusts the statsus->count so that a subsequent call to this api can > + * extract the remaining pointers in the cache line appropriately. > + */ > +static inline unsigned int > +roc_npa_aura_batch_alloc_extract_line(uint64_t *buf, uint64_t *line, > + unsigned int num, unsigned int *rem= ) > +{ > + struct npa_batch_alloc_status_s *status; > + unsigned int avail; > + > + status =3D (struct npa_batch_alloc_status_s *)line; > + roc_npa_batch_alloc_wait(line, 0); > + avail =3D status->count; > + num =3D avail > num ? num : avail; > + if (num) > + memcpy(buf, &line[avail - num], num * sizeof(uint64_t)); > + avail -=3D num; > + if (avail =3D=3D 0) { > + /* Clear the lowest 7 bits of the first pointer */ > + buf[0] &=3D ~0x7FUL; > + status->ccode =3D 0; > + } > + status->count =3D avail; > + *rem =3D avail; > + > + return num; > +} > + > +/* > + * Extract all allocated pointers from a sequence of batch alloc cache l= ines. > + */ > static inline unsigned int > roc_npa_aura_batch_alloc_extract(uint64_t *buf, uint64_t *aligned_buf, > unsigned int num) > @@ -330,11 +379,15 @@ roc_npa_aura_op_bulk_free(uint64_t aura_handle, uin= t64_t const *buf, > } > } > > +/* > + * Issue a batch alloc operation on a sequence of cache lines, wait for = the > + * batch alloc to complete and copy the pointers out into the user buffe= r. > + */ > static inline unsigned int > roc_npa_aura_op_batch_alloc(uint64_t aura_handle, uint64_t *buf, > - uint64_t *aligned_buf, unsigned int num, > - const int dis_wait, const int drop, > - const int partial) > + unsigned int num, uint64_t *aligned_buf, > + unsigned int aligned_buf_sz, const int dis_wa= it, > + const int drop, const int partial) > { > unsigned int count, chunk, num_alloc; > > @@ -344,9 +397,12 @@ roc_npa_aura_op_batch_alloc(uint64_t aura_handle, ui= nt64_t *buf, > > count =3D 0; > while (num) { > - chunk =3D (num > ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS) ? > - ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS = : > - num; > + /* Make sure that the pointers allocated fit into the cac= he > + * lines reserved. > + */ > + chunk =3D aligned_buf_sz / sizeof(uint64_t); > + chunk =3D PLT_MIN(num, chunk); > + chunk =3D PLT_MIN((int)chunk, ROC_CN10K_NPA_BATCH_ALLOC_M= AX_PTRS); > > if (roc_npa_aura_batch_alloc_issue(aura_handle, aligned_b= uf, > chunk, dis_wait, drop)= ) > -- > 2.25.1 >