From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA84FA04C7; Fri, 18 Sep 2020 06:02:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F3D7A1D71F; Fri, 18 Sep 2020 06:02:42 +0200 (CEST) Received: from mail-io1-f66.google.com (mail-io1-f66.google.com [209.85.166.66]) by dpdk.org (Postfix) with ESMTP id D9A0B1C217 for ; Fri, 18 Sep 2020 06:02:40 +0200 (CEST) Received: by mail-io1-f66.google.com with SMTP id u6so5357456iow.9 for ; Thu, 17 Sep 2020 21:02:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=XcZdkrnP1bcLGvi2Tdak2Lr8nahhnSKc53e25SD3fu0=; b=i3COurqnIc1YmPF69Ccw2GIo30ryxG5YXqtW6ea4+s2D8WJv91FI5LBglTbY6Irx8n sq8CAXT+2tGKSYG6fXKlWwl8GIkNrWvb7nm799CbSgjglZb+QGG5R+InOK2zs0DlxzLe 55CIxtbOV/nrEt7G9M/4n49ew5hPkEksT+ARUF1KKPQ+LX1dppNoGyV8jH38A6eHmMuR WcNmgt65+hONsPboUx+x9rCSw4pEtWRcG3uyEcZk0FYhypkFN+UkNhwDLPZfRyShZX75 aYNnO+gjbA8jAZw+XMdF/NyakTv9uhQ0BvPUp6Fsq8YIOM3xUQI2FQwPL8+/em6cE62t dSww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=XcZdkrnP1bcLGvi2Tdak2Lr8nahhnSKc53e25SD3fu0=; b=qYi76WcPqwMRCytUnPrXub9J5oyfx12Wsmo25fxmlusOFaDG5ZZ5T+4ar4YfiPD8L0 7f1lku+nvthhYirOjmRsjLAdenJWZfSIi2De5OkzYv03ihG2mz7Zmbc7JdyZTwf2+9+j 4kO9nx6S/qAUHvRXfEktHvsE2gt/5gmL7xJBXRTOVVj0xOLGcd8Lda/SXyRfIlqlzHxj xvY0LHB8ybFdEszW00v5gU7pQyvn3YbTyTXLNK5Pw/A2gdowdA/Bq3ijqMRl8fJbNwUP 6H/ehHwyeeyx9ceiBM6T41cMooyCIrv282gWLwtOcoUsyfL6+YEQUjEDbcUUq6tTjM6G w86g== X-Gm-Message-State: AOAM5315TbZ6J5EASA/VfmONOwIVZqfEGSXeWQIJQ8RHMsTyVUKbs4m+ ZNpV2pJlKop1Jq4JPuvGDIRCiAXAaUv/heuk1Ec= X-Google-Smtp-Source: ABdhPJxlOHCzWeo0rRQAdps0/nOhSyC+gz1yxadOFM84aHdUPb/aLwP3PL55UpD3zxEw5o1obN6s3w46sCOzIPM6qdo= X-Received: by 2002:a5e:9b04:: with SMTP id j4mr25929564iok.59.1600401760099; Thu, 17 Sep 2020 21:02:40 -0700 (PDT) MIME-Version: 1.0 References: <20200912182434.31067-1-vcchunga@amazon.com> In-Reply-To: From: Jerin Jacob Date: Fri, 18 Sep 2020 09:32:23 +0530 Message-ID: To: Honnappa Nagarahalli Cc: Vimal Chungath , Dharmik Thakkar , "bruce.richardson@intel.com" , "dev@dpdk.org" , "hemant.agrawal@nxp.com" , "jerinj@marvell.com" , nd , "thomas@monjalon.net" , =?UTF-8?Q?Juraj_Linke=C5=A1?= Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 1/2] config: add Graviton2(arm64) meson configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Sep 17, 2020 at 10:41 PM Honnappa Nagarahalli wrote: > > > > > > > > > > > On 9/11/20 8:23 PM, Honnappa Nagarahalli wrote: > > > > > > > > > > +Jerin, Hemant, Dharmik > > > > > > > > > > > > > > > Hi Vimal, > > > > > Few comments inline. > > > > > > > > > >> > > > > >> Add meson build configuration for Graviton2 platform with 64-bit > > > > >> ARM Neoverse N1 cores. This patch makes the following changes to > > > > >> generic Neoverse N1 config: > > > > >> > > > > >> 1. increase lcore limit to 64 > > > > >> 2. increase memory support to 1TB > > > > > There will be multiple SoCs with N1 cores. All of them will have > > > > > the same > > > > implementor ID and part number. But, they will have different values > > > > for these configurable parameters. > > > > > IMO, from usage perspective, we have 2 cases: > > > > > 1) Ability to build a portable binary that can run on multiple Arm > > > > > SoCs (for ex: BlueField, thunderx1, thunderx2, N1SDP, Graviton2 > > > > > etc) > > > > > 2) Ability to build a binary which would run only on a SoC it was > > > > > compiled > > > > for and provide the most optimized binary for that SoC. But, this > > > > may not be portable. > > > > > > > > > > For 1) we have default march. > > > > > > > > > > For 2) we do not have the capability today in meson build (at > > > > > least, this is > > > > my understanding, please correct me if I am wrong). In this case, > > > > the user knows the target platform for compilation. IMO, we should > > > > add the capability to take the target platform as an input from the > > > > user (similar to the make build system) and Graviton2 can be one such > > target platform. > > > > > > > > My intention was to have parameters that work for both N1SDP and > > > > Graviton2 rather than 2). Does the change to RTE_MAX_LCORE and > > > > RTE_MAX_MEM_MB make them incompatible with N1SDP? > > > They are not optimal for N1SDP. In the future these parameters might have > > to be changed. For ex: if there a N1 based SoC with more than 64 CPU cores. > > > > > > Sorry for the late reply. > > > > Looking at the Bluefield, Graviton2, and upcoming SoCs based on ARM IP, It is > > very clear that MIDR value can not be changed by the silicon vendors. > > So our existing build scheme of using the MIDR value-based probe does not > > work anymore with ARM IP. > > So IMO, We need to change our build scheme. i.e > > > > 1) For native build just use -march=native > I think we do not need the native build. With the native build, it is not possible to identify the SoC and use the correct configuration parameters. Ack. Both native and cross can use same config. > > > 2) For cross-build, explicitly, mention the target to pick the configuration > > values instead of probing the MIDR value-based scheme. > Agree > > > > > If we agree, Any volunteers for the update to new scheme? > Arm will work on this. Thanks. We wait for the patch for the rework before applying Graviton patches. > > > > > > > > > > > > > > I'm not sure if taking target platform from user is the best option here. > > > > Would this be specific to N1 since other platforms like thunderx > > > > differentiate the flags with part number? > > > This issue is specific to Arm CPU cores in general. So, it applies to N1 too. > > > > > > > > > > > > > > > > >> 3. remove +crc from -march as that is default when setting > > > > >> armv8.2 > > > > >> > > > > >> For more information about Graviton2 platform, refer to: > > > > >> https://aws.amazon.com/ec2/graviton/ > > > > >> > > > > >> Signed-off-by: Vimal Chungath > > > > >> --- > > > > >> config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++ > > > > >> config/arm/meson.build | 12 +++++++++++- > > > > >> 2 files changed, 28 insertions(+), 1 deletion(-) create mode > > > > >> 100644 config/arm/arm64_graviton2_linux_gcc > > > > >> > > > > >> diff --git a/config/arm/arm64_graviton2_linux_gcc > > > > >> b/config/arm/arm64_graviton2_linux_gcc > > > > >> new file mode 100644 > > > > >> index 000000000..022e06303 > > > > >> --- /dev/null > > > > >> +++ b/config/arm/arm64_graviton2_linux_gcc > > > > >> @@ -0,0 +1,17 @@ > > > > >> +[binaries] > > > > >> +c = 'aarch64-linux-gnu-gcc' > > > > >> +cpp = 'aarch64-linux-gnu-cpp' > > > > >> +ar = 'aarch64-linux-gnu-gcc-ar' > > > > >> +strip = 'aarch64-linux-gnu-strip' > > > > >> +pkgconfig = 'aarch64-linux-gnu-pkg-config' > > > > >> +pcap-config = '' > > > > >> + > > > > >> +[host_machine] > > > > >> +system = 'linux' > > > > >> +cpu_family = 'aarch64' > > > > >> +cpu = 'armv8-a' > > > > >> +endian = 'little' > > > > >> + > > > > >> +[properties] > > > > >> +implementor_id = '0x41' > > > > >> +implementor_pn = '0xd0c' > > > > >> diff --git a/config/arm/meson.build b/config/arm/meson.build > > > > >> index 8728051d5..64e277ebc 100644 > > > > >> --- a/config/arm/meson.build > > > > >> +++ b/config/arm/meson.build > > > > >> @@ -86,6 +86,16 @@ flags_octeontx2_extra = [ > > > > >> ['RTE_ARM_FEATURE_ATOMICS', true], > > > > >> ['RTE_EAL_IGB_UIO', false], > > > > >> ['RTE_USE_C11_MEM_MODEL', true]] > > > > >> +flags_n1generic_extra = [ > > > > >> + ['RTE_MACHINE', '"neoverse-n1"'], > > > > >> + ['RTE_MAX_LCORE', 64], > > > > >> + ['RTE_CACHE_LINE_SIZE', 64], > > > > >> + ['RTE_ARM_FEATURE_ATOMICS', true], > > > > >> + ['RTE_USE_C11_MEM_MODEL', true], > > > > >> + ['RTE_MAX_MEM_MB', 1048576], > > > > >> + ['RTE_MAX_NUMA_NODES', 1], > > > > >> + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false], > > > > >> + ['RTE_LIBRTE_VHOST_NUMA', false]] > > > > >> > > > > >> machine_args_generic = [ > > > > >> ['default', ['-march=armv8-a+crc']], @@ -97,7 +107,7 @@ > > > > >> machine_args_generic = [ > > > > >> ['0xd09', ['-mcpu=cortex-a73']], > > > > >> ['0xd0a', ['-mcpu=cortex-a75']], > > > > >> ['0xd0b', ['-mcpu=cortex-a76']], > > > > >> - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'], > > > > >> flags_n1sdp_extra]] > > > > >> + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], > > > > >> +flags_n1generic_extra]] > > > > >> > > > > >> machine_args_cavium = [ > > > > >> ['default', > > > > >> ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], > > > > >> -- > > > > >> 2.16.6 > > > > > > > >