From: Jerin Jacob <jerinjacobk@gmail.com>
To: Rahul Bhansali <rbhansali@marvell.com>
Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@marvell.com>,
Shijith Thotton <sthotton@marvell.com>,
jerinj@marvell.com
Subject: Re: [PATCH] event/cnxk: reassembly function callback assignment
Date: Wed, 14 Sep 2022 18:51:12 +0530 [thread overview]
Message-ID: <CALBAE1NSd7mAvgw9wXzQJEzvvN2mao2d0vrnYm9ryE0iNP7v3A@mail.gmail.com> (raw)
In-Reply-To: <20220829145821.2514368-1-rbhansali@marvell.com>
On Mon, Aug 29, 2022 at 8:28 PM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> This add the support of reassembly functions callback
> assignment to eventdev dequeue and dequeue_burst.
>
> Fixes: c062f5726f61 ("net/cnxk: support IP reassembly")
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Updated the git commit as follows and applied to
dpdk-next-net-eventdev/for-main. Thanks
event/cnxk: reassembly function callback assignment
Add the support of reassembly functions callback
assignment to eventdev dequeue and dequeue_burst.
Fixes: c062f5726f61 ("net/cnxk: support IP reassembly")
Cc: stable@dpdk.org
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> ---
> drivers/event/cnxk/cn10k_eventdev.c | 232 ++++++++++++++----
> .../cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c | 8 +-
> 2 files changed, 191 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
> index 5a0cab40a9..1db44323a5 100644
> --- a/drivers/event/cnxk/cn10k_eventdev.c
> +++ b/drivers/event/cnxk/cn10k_eventdev.c
> @@ -389,69 +389,209 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)
> #undef R
> };
>
> + const event_dequeue_t sso_hws_reas_deq[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_tmo[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_tmo_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_ca[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_ca_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_tmo_ca[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_seg[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_##name,
> +
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_seg_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_tmo_seg[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_tmo_seg_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_ca_seg[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_t sso_hws_reas_deq_tmo_ca_seg[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> + const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {
> +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_burst_##name,
> + NIX_RX_FASTPATH_MODES
> +#undef R
> + };
> +
> /* Tx modes */
> - const event_tx_adapter_enqueue_t
> - sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = {
> + const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = {
> #define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_##name,
> - NIX_TX_FASTPATH_MODES
> + NIX_TX_FASTPATH_MODES
> #undef T
> - };
> + };
>
> - const event_tx_adapter_enqueue_t
> - sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = {
> + const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = {
> #define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_seg_##name,
> - NIX_TX_FASTPATH_MODES
> + NIX_TX_FASTPATH_MODES
> #undef T
> - };
> + };
>
> event_dev->enqueue = cn10k_sso_hws_enq;
> event_dev->enqueue_burst = cn10k_sso_hws_enq_burst;
> event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst;
> event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst;
> if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_seg);
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_seg_burst);
> - if (dev->is_timeout_deq) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_tmo_seg);
> + if (dev->rx_offloads & NIX_RX_REAS_F) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq_seg);
> CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_tmo_seg_burst);
> - }
> - if (dev->is_ca_internal_port) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_ca_seg);
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_ca_seg_burst);
> - }
> - if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_tmo_ca_seg);
> + sso_hws_reas_deq_seg_burst);
> + if (dev->is_timeout_deq) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_tmo_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_tmo_seg_burst);
> + }
> + if (dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_ca_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_ca_seg_burst);
> + }
> + if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_tmo_ca_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_tmo_ca_seg_burst);
> + }
> + } else {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg);
> CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_tmo_ca_seg_burst);
> + sso_hws_deq_seg_burst);
> +
> + if (dev->is_timeout_deq) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_deq_tmo_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_tmo_seg_burst);
> + }
> + if (dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_ca_seg_burst);
> + }
> + if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_deq_tmo_ca_seg);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_tmo_ca_seg_burst);
> + }
> }
> } else {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_burst);
> - if (dev->is_timeout_deq) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_tmo);
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_tmo_burst);
> - }
> - if (dev->is_ca_internal_port) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_ca);
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_ca_burst);
> - }
> - if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> - sso_hws_deq_tmo_ca);
> + if (dev->rx_offloads & NIX_RX_REAS_F) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq);
> CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> - sso_hws_deq_tmo_ca_burst);
> + sso_hws_reas_deq_burst);
> +
> + if (dev->is_timeout_deq) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_tmo);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_tmo_burst);
> + }
> + if (dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_ca);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_ca_burst);
> + }
> + if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,
> + sso_hws_reas_deq_tmo_ca);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_reas_deq_tmo_ca_burst);
> + }
> + } else {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, sso_hws_deq_burst);
> +
> + if (dev->is_timeout_deq) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_tmo_burst);
> + }
> + if (dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_ca_burst);
> + }
> + if (dev->is_timeout_deq && dev->is_ca_internal_port) {
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo_ca);
> + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,
> + sso_hws_deq_tmo_ca_burst);
> + }
> }
> }
> event_dev->ca_enqueue = cn10k_sso_hws_ca_enq;
> diff --git a/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c
> index 2dff8795c8..9af8d6e128 100644
> --- a/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c
> +++ b/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c
> @@ -6,9 +6,11 @@
> #include "cnxk_eventdev.h"
> #include "cnxk_worker.h"
>
> -#define R(name, flags) \
> - SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \
> - cn10k_sso_hws_reas_deq_tmo_seg_##name, flags)
> +#define R(name, flags) \
> + SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \
> + cn10k_sso_hws_deq_tmo_seg_##name, flags) \
> + SSO_CMN_DEQ_BURST(cn10k_sso_hws_reas_deq_tmo_seg_burst_##name, \
> + cn10k_sso_hws_reas_deq_tmo_seg_##name, flags | NIX_RX_REAS_F)
>
> NIX_RX_FASTPATH_MODES_0_15
> #undef R
> --
> 2.25.1
>
prev parent reply other threads:[~2022-09-14 13:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 14:58 Rahul Bhansali
2022-09-14 13:21 ` Jerin Jacob [this message]
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