From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6F6F2A04B6; Wed, 19 Jan 2022 17:29:13 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 06DD141172; Wed, 19 Jan 2022 17:29:13 +0100 (CET) Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) by mails.dpdk.org (Postfix) with ESMTP id 955604116E for ; Wed, 19 Jan 2022 17:29:11 +0100 (CET) Received: by mail-io1-f43.google.com with SMTP id o9so3497143iob.3 for ; Wed, 19 Jan 2022 08:29:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=j9nXIuR4lZardxgtYuMuCwBvU+S4X6qoOAsbqDI4aIQ=; b=TFupHorJmBbNbkHn8GyjD/t2yF1XUnxw9w2cNfSquiVZH36fk5ipWYzDOGO7eCI6pP H9ctoHZe8AnFzc6vq01dswAkKAqneEfqWbBuz04En1DUf3KFIbu6E4jBUwC+VtnYfLVv EFOTqIl28u76jBeTk0+jW3xsgdzqSddD0ZRNvIa4pMnHUnWCiMO4YPHpw3pcXeUpSayb lt8X74PAUeBlW/E78F+Rb5ByjsL8ZqkDRkVKQvYIJ4PjIZv1Ojzjh3VpyRB4PO5/XJ7P j1aBCLTGCAywE2+ndi/P6slMZGWgOdw2D9EpRengbaYyHJQrfSOlDz5xZdI6Rjrmi7pe DCuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=j9nXIuR4lZardxgtYuMuCwBvU+S4X6qoOAsbqDI4aIQ=; b=gian4BmfHnHE0QTjA4XYq36HV50MkazNoy5l4UKCWDbUMX7sZEM2N9BGlBmhhhtii2 LOO8Eb9PvY75u5Z9DI5aeF8p/xCVRXod/GS74SpIxYiXDtjHWrT/PhIBVkHHvLXHLXjv a/+h5Zhzz+46JK6d3lVajZgaD/3J6I91DoDkAtkmbPSLtZmL7G6F02cyk03JWBT1XKBG pDctR4ELv6IVTZikOqCIlkZwhUe1iTL1QDnKIgZClY5D+FcCfud5eS3LivF/15FD2StC H1hTy7ceCItgSgRKqMOyhQpl9GLSSvLAUt4fLMkycFpclOXMKMY77shGf+tnHmCgrUBP 5jDw== X-Gm-Message-State: AOAM532t/zIowVO2Ikk9mrxrtJP4pt0zoiCYjyZfmjIm+sOlnCQxxM3o NKDcHFyYR8pWEi5frN0q0OaWH1c0893ID4kiVKuyA7yDg3Fg4A== X-Google-Smtp-Source: ABdhPJxKFrDdPkuFOK4j2F3on7TJjhCTxTx3LlOiqjgc2xp8hUDm4pUkxrrV+iJReSdxIDlg1pWRcCWrfQTg7IJazXs= X-Received: by 2002:a05:6602:c2:: with SMTP id z2mr11353433ioe.25.1642609750984; Wed, 19 Jan 2022 08:29:10 -0800 (PST) MIME-Version: 1.0 References: <20211209091342.27017-1-ndabilpuram@marvell.com> <20211209091342.27017-5-ndabilpuram@marvell.com> In-Reply-To: <20211209091342.27017-5-ndabilpuram@marvell.com> From: Jerin Jacob Date: Wed, 19 Jan 2022 21:58:44 +0530 Message-ID: Subject: Re: [PATCH 5/8] common/cnxk: always use single qint with NIX To: Nithin Dabilpuram Cc: Jerin Jacob , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , dpdk-dev , Harman Kalra Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Dec 9, 2021 at 2:44 PM Nithin Dabilpuram wrote: > > From: Harman Kalra > > An errata exists whereby, in certain cases NIX may use an > incorrect QINT_IDX for SQ interrupts. As a result, the > interrupt may not be delivered to software, or may not be > associated with the correct SQ. > When NIX uses an incorrect QINT_IDX : > 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for > incorrect QINT. > 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect > QINT. > > Signed-off-by: Harman Kalra Changed the subject to; common/cnxk: always use single interrupt ID with NIX Acked-by: Jerin Jacob Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_nix_queue.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c > index c8c8401..4455fc1 100644 > --- a/drivers/common/cnxk/roc_nix_queue.c > +++ b/drivers/common/cnxk/roc_nix_queue.c > @@ -680,7 +680,11 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, > aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR); > > /* Many to one reduction */ > - aq->sq.qint_idx = sq->qid % nix->qints; > + /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can > + * send incorrect QINT_IDX when reporting queue interrupt (QINT). This > + * might result in software missing the interrupt. > + */ > + aq->sq.qint_idx = 0; > } > > static int > @@ -779,8 +783,11 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, > aq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR); > aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR); > > - /* Many to one reduction */ > - aq->sq.qint_idx = sq->qid % nix->qints; > + /* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can > + * send incorrect QINT_IDX when reporting queue interrupt (QINT). This > + * might result in software missing the interrupt. > + */ > + aq->sq.qint_idx = 0; > } > > static int > -- > 2.8.4 >