From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B6767A04DD; Fri, 20 Nov 2020 13:28:25 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 941CFC8F6; Fri, 20 Nov 2020 13:28:24 +0100 (CET) Received: from mail-io1-f65.google.com (mail-io1-f65.google.com [209.85.166.65]) by dpdk.org (Postfix) with ESMTP id 2A823C87E; Fri, 20 Nov 2020 13:28:21 +0100 (CET) Received: by mail-io1-f65.google.com with SMTP id m13so9700746ioq.9; Fri, 20 Nov 2020 04:28:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=NS4+HdQtu+oCcfNOEwVT1HEGj98dp4Jasp9lXipM11Y=; b=q/GLnVOx0QB/uPyUu07CQbNBtrY7si4APnM2dXnKTzVlN8zIJi0cMMk+Wh2LE+Oehz 1rTV7IMJh0d9W8uXTUO/zJ7Z4RYiuR2yuxnPe0pdH6TPRJGyKP3EiDvXiozfmX+2P10Q ogZNl9tJFLbiFoCKI9rlK96sW7O2ARd/C17kfOlnP9eTiwm42Gx/VqsMw/Tn/JvE3Vt0 t2qSxMv0I5NtYCMytK+ffHRJpYAjohHRt4c5ume3QvhSMLS6TrAAfwVgUxg6RaVrHqnM PciTV4D9yh1JXIHelNxLd+edlSRfkiLp4KujHcOh0IxMR8GTMm18RgpQoNf6FovSEElX 6feQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NS4+HdQtu+oCcfNOEwVT1HEGj98dp4Jasp9lXipM11Y=; b=Myx+PTeC+buTWFnQfL6ASYoZ9jV0X+PILW61aFKVXTuNY0IMXB7d707J/eTKPgk7/L g5qgiN7vEjz2CUu90EhlFGn/NgDyL+H3TgaGSu2Ib+SxvRdEECj5CUzRxtndRZ7R8t/q KGQ1kpzEFvUQ1PfPKF7nvJfDAwCiTBLQmaNEHGVWDKPHH4TeIhAJrohiKdEjIs7aaOz8 dGhKyGuXC3eR6XEBgzb8RnZ7wLf6TEKZHV4JnkaUlUHS6tUIpuUqkL+kjX8Ku0x56hWo LUs98w+TQo6DXKCSIH/1AdIfTECUcB2H1hOUqUjUwf6e0GYPI9s9c8WX6X6NkSRJQE11 x6qg== X-Gm-Message-State: AOAM530BgCR384tmdWXEpRR2T8Nkt2jesojsPp/jdrVh6mMkiPOR1CP+ uDxGTzfl3CgquwBL7xw7CnAazGv431M7J91JjWECmz+Jy9bYBIBh X-Google-Smtp-Source: ABdhPJy2kFE6TcEALG8f+TFYY0LlZTLyzHBWi9jXZDG3dB3H3yzXKbvuyeof5G4DH4rRjvM+2pUwvFwFROWXxGQubyo= X-Received: by 2002:a5d:9a19:: with SMTP id s25mr9527735iol.94.1605875299513; Fri, 20 Nov 2020 04:28:19 -0800 (PST) MIME-Version: 1.0 References: <20201117164630.2971-1-pbhagavatula@marvell.com> <20201120104147.1473-1-pbhagavatula@marvell.com> In-Reply-To: <20201120104147.1473-1-pbhagavatula@marvell.com> From: Jerin Jacob Date: Fri, 20 Nov 2020 17:58:03 +0530 Message-ID: To: Pavan Nikhilesh Cc: Jerin Jacob , dpdk-dev , dpdk stable Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v2] event/octeontx2: fix unconditional Tx flush X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Nov 20, 2020 at 4:12 PM wrote: > > From: Pavan Nikhilesh > > Fix unconditional Tx flush, handle packet retransmit cases where > flush has to be differed. > > Fixes: cb7ee83b6365 ("event/octeontx2: improve single flow performance") > Cc: stable@dpdk.org > > Signed-off-by: Pavan Nikhilesh Reworded the git commit message to: event/octeontx2: fix unconditional Tx flush Fix unconditional Tx flush, in case of Tx only we need to check if work slot is non-empty before issuing flush. Also, in packet retransmit cases added check for the reference count and flush the work slot only for the last packet. Fixes: cb7ee83b6365 ("event/octeontx2: improve single flow performance") Cc: stable@dpdk.org Signed-off-by: Pavan Nikhilesh Applied to dpdk-next-net-eventdev/for-main. Thanks > --- > drivers/event/octeontx2/otx2_evdev.h | 1 + > drivers/event/octeontx2/otx2_worker.c | 14 +++++++++----- > drivers/event/octeontx2/otx2_worker.h | 20 +++++++++++++++----- > 3 files changed, 25 insertions(+), 10 deletions(-) > > diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h > index 547e29d4a..49a865e6f 100644 > --- a/drivers/event/octeontx2/otx2_evdev.h > +++ b/drivers/event/octeontx2/otx2_evdev.h > @@ -79,6 +79,7 @@ > #define SSOW_LF_GWS_OP_GWC_INVAL (0xe00ull) > > #define OTX2_SSOW_GET_BASE_ADDR(_GW) ((_GW) - SSOW_LF_GWS_OP_GET_WORK) > +#define OTX2_SSOW_TT_FROM_TAG(x) (((x) >> 32) & SSO_TT_EMPTY) > > #define NSEC2USEC(__ns) ((__ns) / 1E3) > #define USEC2NSEC(__us) ((__us) * 1E3) > diff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c > index 1d427e4a3..b098407e0 100644 > --- a/drivers/event/octeontx2/otx2_worker.c > +++ b/drivers/event/octeontx2/otx2_worker.c > @@ -274,12 +274,14 @@ otx2_ssogws_tx_adptr_enq_ ## name(void *port, struct rte_event ev[], \ > { \ > struct otx2_ssogws *ws = port; \ > uint64_t cmd[sz]; \ > + int i; \ > \ > - RTE_SET_USED(nb_events); \ > - return otx2_ssogws_event_tx(ws, ev, cmd, (const uint64_t \ > + for (i = 0; i < nb_events; i++) \ > + otx2_ssogws_event_tx(ws, &ev[i], cmd, (const uint64_t \ > (*)[RTE_MAX_QUEUES_PER_PORT]) \ > &ws->tx_adptr_data, \ > flags); \ > + return nb_events; \ > } > SSO_TX_ADPTR_ENQ_FASTPATH_FUNC > #undef T > @@ -289,14 +291,16 @@ uint16_t __rte_hot \ > otx2_ssogws_tx_adptr_enq_seg_ ## name(void *port, struct rte_event ev[],\ > uint16_t nb_events) \ > { \ > - struct otx2_ssogws *ws = port; \ > uint64_t cmd[(sz) + NIX_TX_MSEG_SG_DWORDS - 2]; \ > + struct otx2_ssogws *ws = port; \ > + int i; \ > \ > - RTE_SET_USED(nb_events); \ > - return otx2_ssogws_event_tx(ws, ev, cmd, (const uint64_t \ > + for (i = 0; i < nb_events; i++) \ > + otx2_ssogws_event_tx(ws, &ev[i], cmd, (const uint64_t \ > (*)[RTE_MAX_QUEUES_PER_PORT]) \ > &ws->tx_adptr_data, \ > (flags) | NIX_TX_MULTI_SEG_F); \ > + return nb_events; \ > } > SSO_TX_ADPTR_ENQ_FASTPATH_FUNC > #undef T > diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h > index 3efd3ba97..0a7d6671c 100644 > --- a/drivers/event/octeontx2/otx2_worker.h > +++ b/drivers/event/octeontx2/otx2_worker.h > @@ -198,6 +198,10 @@ otx2_ssogws_swtag_untag(struct otx2_ssogws *ws) > static __rte_always_inline void > otx2_ssogws_swtag_flush(struct otx2_ssogws *ws) > { > + if (OTX2_SSOW_TT_FROM_TAG(otx2_read64(ws->tag_op)) == SSO_TT_EMPTY) { > + ws->cur_tt = SSO_SYNC_EMPTY; > + return; > + } > otx2_write64(0, ws->swtag_flush_op); > ws->cur_tt = SSO_SYNC_EMPTY; > } > @@ -272,13 +276,14 @@ otx2_ssogws_prepare_pkt(const struct otx2_eth_txq *txq, struct rte_mbuf *m, > } > > static __rte_always_inline uint16_t > -otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], > - uint64_t *cmd, const uint64_t > - txq_data[][RTE_MAX_QUEUES_PER_PORT], > +otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event *ev, > + uint64_t *cmd, > + const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT], > const uint32_t flags) > { > - struct rte_mbuf *m = ev[0].mbuf; > + struct rte_mbuf *m = ev->mbuf; > const struct otx2_eth_txq *txq; > + uint16_t ref_cnt = m->refcnt; > > if ((flags & NIX_TX_OFFLOAD_SECURITY_F) && > (m->ol_flags & PKT_TX_SEC_OFFLOAD)) { > @@ -329,7 +334,12 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], > } > } > > - otx2_write64(0, ws->swtag_flush_op); > + if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) { > + if (ref_cnt > 1) > + return 1; > + } > + > + otx2_ssogws_swtag_flush(ws); > > return 1; > } > -- > 2.17.1 >