From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F05AFA04B3; Mon, 16 Dec 2019 05:55:10 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A20131C05C; Mon, 16 Dec 2019 05:55:09 +0100 (CET) Received: from mail-io1-f68.google.com (mail-io1-f68.google.com [209.85.166.68]) by dpdk.org (Postfix) with ESMTP id 861731C043 for ; Mon, 16 Dec 2019 05:55:07 +0100 (CET) Received: by mail-io1-f68.google.com with SMTP id c16so3608021ioh.6 for ; Sun, 15 Dec 2019 20:55:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ii3uZ8c24vBCA7/P9oGQWiX1+voMWgpjv+5dPB08aoc=; b=CLLTMmaRV7EBmaCCXhbgpoaDxs3MI8KfNQwIiH1d6ZyRAQnFatD5kc0pQU0mEIkNB7 c0cmc6iNJ5egvUJ1+MkuZpMdArAnzVyrz8P+xW+hxMMtezQQeWt+3JXrD1+9WvI175bS dIQIiT2wHoT+3RHP0Z94G60PIsNWdhaJ8HYhJtkDUQpW2bhO9KtJN8af/tllrvvcMtWv ccwfQQbWQPzJFQ256ImZsn5j5E4/mu+0qxsYqCLpDXGB1ysjUB76KhqAWG/Ca3s/yM+A NZdG5H7VtCm5ilokaNvLAubYEacyLda0p9piS4ElgjvMdFtnsM1VMNO7bd+SzsyqbPQY CGmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ii3uZ8c24vBCA7/P9oGQWiX1+voMWgpjv+5dPB08aoc=; b=EzXRm/rxthZ1vq7kVmUOkvdCAVC8NwX1kYqR320LyNWhJj+kYmqygGDR3tnSIcmtX7 GiFR9VRTuf2QGhYtO48IivWvfbY8jLt8NVtesm/jI43o2GrVKIxnRRqED0Wf2Ik8hkMa 0/atEG00rFhnh3QJo7hgDQQrdjQz3tqn6wLdvK0/i0jcn1P75JVHfu9Z5SWTDqLaorTF lA8cunJLkTsesl9NYbABa1T0RxdsLe5wrmxg1EZvW7cgBrI+rexC4xGk99yduPa9oQ/a tbLvgfyB4zrcBImZUPYp7fs3w+3l3g2smf/bHZUlwNs99CJvqykyRmwZiWRCtHmy/q/c bppA== X-Gm-Message-State: APjAAAVBs44AlJUsDSD9CrsfPPv5xWdan4ShbCDycrVXJYUwte/W/0Kf z7qvnzi9uPIkR8YnxttgC8bbsWlH6ri/imIGmsk= X-Google-Smtp-Source: APXvYqxReoRuWeR+VnLOLybuvQKUshFD8QydbE9xWwXVMo2R9jna6nccmLcVtoxvI4G5g7hTLA0tpBBm8nOOu2I20ew= X-Received: by 2002:a5e:8b44:: with SMTP id z4mr16751695iom.271.1576472106625; Sun, 15 Dec 2019 20:55:06 -0800 (PST) MIME-Version: 1.0 References: <1576057875-7677-1-git-send-email-xiaojun.liu@silicom.co.il> <1576057875-7677-2-git-send-email-xiaojun.liu@silicom.co.il> In-Reply-To: From: Jerin Jacob Date: Mon, 16 Dec 2019 10:24:50 +0530 Message-ID: To: Xiaojun Liu Cc: "xiao.w.wang@intel.com" , "qi.z.zhang@intel.com" , "ngai-mint.kwan@intel.com" , "jakub.fornal@intel.co" , "jacob.e.keller@intel.com" , "dev@dpdk.org" , Jeff Zheng , Eyal Cohen Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v2 1/7] net/fm10k: add i2c sbus registers definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Dec 13, 2019 at 8:14 AM Xiaojun Liu wrote: > > 1. FM10K is the i2c master, the PCA9545/PCA9505/PCA9538 are the slave. > 2. All the i2c slave connect on board to FM10K SoC. > 3. To control the PHY and LED Yes. These are onboard devices, so it makes sense to segregate code for i2c master(in this case FM10K) and slave and bus API to reuse the logic. This to address the case where PCA9545 used by other i2c master or new board come up with a new i2c device instead of PCA9545 etc. And yes, DPDK is missing all these infrastructure code pieces. So it is good to add infrastructure first. I am leaving the decision to you and/or community. > > > -----Original Message----- > From: Jerin Jacob [mailto:jerinjacobk@gmail.com] > Sent: Friday, December 13, 2019 1:12 AM > To: Xiaojun Liu > Cc: xiao.w.wang@intel.com; qi.z.zhang@intel.com; ngai-mint.kwan@intel.com; jakub.fornal@intel.co; jacob.e.keller@intel.com; dev@dpdk.org; Jeff Zheng; Eyal Cohen > Subject: Re: [dpdk-dev] [PATCH v2 1/7] net/fm10k: add i2c sbus registers definition > > On Thu, Dec 12, 2019 at 3:05 PM Xiaojun Liu wrote: > > > > This is not a generic i2c bus, but rather an indirect access to i2c devices through FM10k registers. It's only purpose is to support the fm10k chip. Also there's currently no i2c bus support framework in DPDK. > > To understand it better: > > # Who are the i2c master and i2c slave here? > # Is i2c slave connected on board or in-built to FM10K SoC? > # What is the purpose of the i2c API in the ethdev driver? > > > > > > > -----Original Message----- > > From: Jerin Jacob [mailto:jerinjacobk@gmail.com] > > Sent: Wednesday, December 11, 2019 11:48 PM > > To: Xiaojun Liu > > Cc: xiao.w.wang@intel.com; qi.z.zhang@intel.com; ngai-mint.kwan@intel.com; jakub.fornal@intel.co; jacob.e.keller@intel.com; dev@dpdk.org > > Subject: Re: [dpdk-dev] [PATCH v2 1/7] net/fm10k: add i2c sbus registers definition > > > > On Wed, Dec 11, 2019 at 3:22 PM Xiaojun Liu wrote: > > > > > > To support switch management, add the following files: > > > Add fm10k/switch/fm10k_debug.h(define log Macros). > > > Add fm10k/switch/fm10k_regs.h(define all the registers). > > > Add fm10k/switch/fm10k_switch.h(define switch Macros and APIs). > > > Add fm10k/switch/fm10k_i2c.h(define I2C interfaces). > > > Add fm10k/switch/fm10k_i2c.c(support I2C access). > > > Add fm10k/switch/fm10k_sbus.h(define SBUS interface). > > > Add fm10k/switch/fm10k_sbus.c(support SBUS access). > > > and modify fm10k/Makefile(add ENABLE_FM10K_MANAGEMENT support, > > > add fm10k_i2c.c and fm10k_sbus.c). > > > > Integrating NIC with the integrated or onboard switches over i2c or > > sbus is a common problem. > > Instead of polluting ethdev driver with i2c and sbus _bus_ code, Why > > not add new i2c bus > > and move this code to driver/bus/i2c/xxxx/ > > > > > > > > To avoid configuration for both kernel driver > > > and userspace SDK outside DPDK, we add switch > > > management in FM10K DPDK PMD driver. > > > To enable switch management, you need add > > > CONFIG_RTE_FM10K_MANAGEMENT=y in > > > config/common_linux when building. > > > > > > Signed-off-by: Xiaojun Liu