From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9B96A42CC2; Thu, 15 Jun 2023 09:04:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 37FA840E0F; Thu, 15 Jun 2023 09:04:07 +0200 (CEST) Received: from mail-vs1-f42.google.com (mail-vs1-f42.google.com [209.85.217.42]) by mails.dpdk.org (Postfix) with ESMTP id CD08D40DDA for ; Thu, 15 Jun 2023 09:04:05 +0200 (CEST) Received: by mail-vs1-f42.google.com with SMTP id ada2fe7eead31-43dc3f77accso1322343137.3 for ; Thu, 15 Jun 2023 00:04:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686812645; x=1689404645; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=1aALM/amMpjIAs3Catp47bEoqTsC/9Nz+Ax5Nj6Ap0o=; b=Y1Rgm/18KijizDYt4h2tO3RlbL2ALOQMOM9hf8s06HkxflkrnbupKwsCFprcIPQB8j yepFt2P2YU/IU6jM4SEEikZ6JOHpXa903FUs2LeI22ANoaWBX3K7USRfGdNY9VWcTZ5h KvkJpHZRMjvHA189GjexPm2/1utoMxJuPhwLMrrX9zC73WPcDU1Lz//aqtKDnGCszy3r yrwZQ/kVz8otbeBp0DTeA06ddQjA8ikQ2FrzfkfyMrO6AsIwB9jdxZlJ0OOgc3ep+3ZV 35K0fdPNe9rBqkobJer/QqxgJ46NvB+pf7jK6e3yx7B6rf1Gwwl0hvIja7VxrD6P7vxm RR/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686812645; x=1689404645; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1aALM/amMpjIAs3Catp47bEoqTsC/9Nz+Ax5Nj6Ap0o=; b=bPVrmm+05WydiTMP8kTy2o3p18g/aAKtGRUMIhplgwIw7MqH5v1+VCXMfrLY+l0Om5 74qnPab7ffuMHrWdSumiDvZ/Xc6wMDMWhTRme8nSwYkjsIIKSyA/mA6viBcZ0bP/F3B9 5KWWuIJ5elPMNBaHIS1IHn0jZHIT2sR8I8LH2/JylZ4Na7lKt5E1dQpNaC2H8NnCOBMu 62v2OuRwVuWpTrF6RBJfD40/oqTtS0TckvtpgAtN96Hnt8p2enE3rmd47rdEpxEgiL1/ cSBIAGymwFzboDu3tMngr+b37xPbr2bpESzX44kK+gq1nZa+AUGM1jUg/mj4+fFxPQGh LJfQ== X-Gm-Message-State: AC+VfDx1hOr440R/3KSpPEJSoc4vVJO91ByoWBx8Ui69lcUeHXFPUFGH 9jK6bjzIMiV9WPv63u8kW8YXrLm23H440DRrlUlGI9rdchP63Tw8 X-Google-Smtp-Source: ACHHUZ5Qxxd03Z4CNhluRD4XQ1wNugg0VXwu4CPJP1mYhqO+Zv2jab+PWdKbuo3rOsC5KTRqTzMItf9Ee6Z/41mTCq4= X-Received: by 2002:a67:fd62:0:b0:42c:922e:65dd with SMTP id h2-20020a67fd62000000b0042c922e65ddmr10051144vsa.23.1686812645008; Thu, 15 Jun 2023 00:04:05 -0700 (PDT) MIME-Version: 1.0 References: <20230613102009.2390568-1-gakhil@marvell.com> <20230614130901.3245809-1-gakhil@marvell.com> <20230614130901.3245809-16-gakhil@marvell.com> In-Reply-To: <20230614130901.3245809-16-gakhil@marvell.com> From: Jerin Jacob Date: Thu, 15 Jun 2023 12:33:38 +0530 Message-ID: Subject: Re: [PATCH v5 15/15] net/cnxk: add MACsec stats To: Akhil Goyal Cc: dev@dpdk.org, thomas@monjalon.net, david.marchand@redhat.com, vattunuru@marvell.com, jerinj@marvell.com, adwivedi@marvell.com, ndabilpuram@marvell.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, Jun 14, 2023 at 6:41=E2=80=AFPM Akhil Goyal wr= ote: > > Added support for MACsec SC/flow/session stats. > > Signed-off-by: Akhil Goyal Series applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > doc/guides/rel_notes/release_23_07.rst | 10 ++-- > drivers/net/cnxk/cn10k_ethdev_sec.c | 11 +++-- > drivers/net/cnxk/cnxk_ethdev_mcs.c | 64 ++++++++++++++++++++++++++ > drivers/net/cnxk/cnxk_ethdev_mcs.h | 9 ++++ > 4 files changed, 87 insertions(+), 7 deletions(-) > > diff --git a/doc/guides/rel_notes/release_23_07.rst b/doc/guides/rel_note= s/release_23_07.rst > index 915c37529a..d6af8c25a7 100644 > --- a/doc/guides/rel_notes/release_23_07.rst > +++ b/doc/guides/rel_notes/release_23_07.rst > @@ -139,6 +139,12 @@ New Features > for new capability registers, large passthrough BAR and some > performance enhancements for UPT. > > +* **Updated Marvell cnxk ethdev driver.** > + > + * Extended ``RTE_FLOW_ACTION_TYPE_PORT_ID`` to redirect traffic across= PF ports. > + * Added support for Inline MACsec processing using rte_security framew= ork > + for CN103 platform. > + > * **Added new algorithms to cryptodev.** > > * Added asymmetric algorithm ShangMi 2 (SM2) along with prime field cu= rve support. > @@ -155,10 +161,6 @@ New Features > * Added support for SM3 hash operations. > * Added support for AES-CCM in cn9k and cn10k drivers. > > -* **Updated Marvell cnxk ethdev driver.** > - > - * Extended ``RTE_FLOW_ACTION_TYPE_PORT_ID`` to redirect traffic across= PF ports. > - > * **Updated OpenSSL crypto driver.** > > * Added SM2 algorithm support in asymmetric crypto operations. > diff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k= _ethdev_sec.c > index f20e573338..b98fc9378e 100644 > --- a/drivers/net/cnxk/cn10k_ethdev_sec.c > +++ b/drivers/net/cnxk/cn10k_ethdev_sec.c > @@ -1058,12 +1058,17 @@ cn10k_eth_sec_session_stats_get(void *device, str= uct rte_security_session *sess, > { > struct rte_eth_dev *eth_dev =3D (struct rte_eth_dev *)device; > struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > + struct cnxk_macsec_sess *macsec_sess; > struct cnxk_eth_sec_sess *eth_sec; > int rc; > > eth_sec =3D cnxk_eth_sec_sess_get_by_sess(dev, sess); > - if (eth_sec =3D=3D NULL) > + if (eth_sec =3D=3D NULL) { > + macsec_sess =3D cnxk_eth_macsec_sess_get_by_sess(dev, ses= s); > + if (macsec_sess) > + return cnxk_eth_macsec_session_stats_get(dev, mac= sec_sess, stats); > return -EINVAL; > + } > > rc =3D roc_nix_inl_sa_sync(&dev->nix, eth_sec->sa, eth_sec->inb, > ROC_NIX_INL_SA_OP_FLUSH); > @@ -1107,6 +1112,6 @@ cn10k_eth_sec_ops_override(void) > cnxk_eth_sec_ops.capabilities_get =3D cn10k_eth_sec_capabilities_= get; > cnxk_eth_sec_ops.session_update =3D cn10k_eth_sec_session_update; > cnxk_eth_sec_ops.session_stats_get =3D cn10k_eth_sec_session_stat= s_get; > - cnxk_eth_sec_ops.macsec_sc_stats_get =3D NULL; > - cnxk_eth_sec_ops.macsec_sa_stats_get =3D NULL; > + cnxk_eth_sec_ops.macsec_sc_stats_get =3D cnxk_eth_macsec_sc_stats= _get; > + cnxk_eth_sec_ops.macsec_sa_stats_get =3D cnxk_eth_macsec_sa_stats= _get; > } > diff --git a/drivers/net/cnxk/cnxk_ethdev_mcs.c b/drivers/net/cnxk/cnxk_e= thdev_mcs.c > index 87bfcb8b4e..5264774394 100644 > --- a/drivers/net/cnxk/cnxk_ethdev_mcs.c > +++ b/drivers/net/cnxk/cnxk_ethdev_mcs.c > @@ -521,6 +521,70 @@ cnxk_mcs_flow_destroy(struct cnxk_eth_dev *dev, void= *flow) > return ret; > } > > +int > +cnxk_eth_macsec_sa_stats_get(void *device, uint16_t sa_id, enum rte_secu= rity_macsec_direction dir, > + struct rte_security_macsec_sa_stats *stats) > +{ > + RTE_SET_USED(device); > + RTE_SET_USED(sa_id); > + RTE_SET_USED(dir); > + RTE_SET_USED(stats); > + > + return 0; > +} > + > +int > +cnxk_eth_macsec_sc_stats_get(void *device, uint16_t sc_id, enum rte_secu= rity_macsec_direction dir, > + struct rte_security_macsec_sc_stats *stats) > +{ > + struct rte_eth_dev *eth_dev =3D (struct rte_eth_dev *)device; > + struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > + struct cnxk_mcs_dev *mcs_dev =3D dev->mcs_dev; > + struct roc_mcs_stats_req req =3D {0}; > + > + if (!roc_feature_nix_has_macsec()) > + return -ENOTSUP; > + > + req.id =3D sc_id; > + req.dir =3D (dir =3D=3D RTE_SECURITY_MACSEC_DIR_RX) ? MCS_RX : MC= S_TX; > + > + return roc_mcs_sc_stats_get(mcs_dev->mdev, &req, (struct roc_mcs_= sc_stats *)stats); > +} > + > +int > +cnxk_eth_macsec_session_stats_get(struct cnxk_eth_dev *dev, struct cnxk_= macsec_sess *sess, > + struct rte_security_stats *stats) > +{ > + struct cnxk_mcs_dev *mcs_dev =3D dev->mcs_dev; > + struct roc_mcs_flowid_stats flow_stats =3D {0}; > + struct roc_mcs_port_stats port_stats =3D {0}; > + struct roc_mcs_stats_req req =3D {0}; > + > + if (!roc_feature_nix_has_macsec()) > + return -ENOTSUP; > + > + req.id =3D sess->flow_id; > + req.dir =3D sess->dir; > + roc_mcs_flowid_stats_get(mcs_dev->mdev, &req, &flow_stats); > + plt_nix_dbg("\n******* FLOW_ID IDX[%u] STATS dir: %u********\n", = sess->flow_id, sess->dir); > + plt_nix_dbg("TX: tcam_hit_cnt: 0x%" PRIx64 "\n", flow_stats.tcam_= hit_cnt); > + > + req.id =3D mcs_dev->port_id; > + req.dir =3D sess->dir; > + roc_mcs_port_stats_get(mcs_dev->mdev, &req, &port_stats); > + plt_nix_dbg("\n********** PORT[0] STATS ****************\n"); > + plt_nix_dbg("RX tcam_miss_cnt: 0x%" PRIx64 "\n", port_stats.tcam_= miss_cnt); > + plt_nix_dbg("RX parser_err_cnt: 0x%" PRIx64 "\n", port_stats.pars= er_err_cnt); > + plt_nix_dbg("RX preempt_err_cnt: 0x%" PRIx64 "\n", port_stats.pre= empt_err_cnt); > + plt_nix_dbg("RX sectag_insert_err_cnt: 0x%" PRIx64 "\n", port_sta= ts.sectag_insert_err_cnt); > + > + req.id =3D sess->secy_id; > + req.dir =3D sess->dir; > + > + return roc_mcs_secy_stats_get(mcs_dev->mdev, &req, > + (struct roc_mcs_secy_stats *)(&stat= s->macsec)); > +} > + > static int > cnxk_mcs_event_cb(void *userdata, struct roc_mcs_event_desc *desc, void = *cb_arg) > { > diff --git a/drivers/net/cnxk/cnxk_ethdev_mcs.h b/drivers/net/cnxk/cnxk_e= thdev_mcs.h > index a9148cc374..131dab10c5 100644 > --- a/drivers/net/cnxk/cnxk_ethdev_mcs.h > +++ b/drivers/net/cnxk/cnxk_ethdev_mcs.h > @@ -100,6 +100,15 @@ int cnxk_eth_macsec_sa_destroy(void *device, uint16_= t sa_id, > int cnxk_eth_macsec_sc_destroy(void *device, uint16_t sc_id, > enum rte_security_macsec_direction dir); > > +int cnxk_eth_macsec_sa_stats_get(void *device, uint16_t sa_id, > + enum rte_security_macsec_direction dir, > + struct rte_security_macsec_sa_stats *sta= ts); > +int cnxk_eth_macsec_sc_stats_get(void *device, uint16_t sa_id, > + enum rte_security_macsec_direction dir, > + struct rte_security_macsec_sc_stats *sta= ts); > +int cnxk_eth_macsec_session_stats_get(struct cnxk_eth_dev *dev, struct c= nxk_macsec_sess *sess, > + struct rte_security_stats *stats); > + > int cnxk_eth_macsec_session_create(struct cnxk_eth_dev *dev, struct rte_= security_session_conf *conf, > struct rte_security_session *sess); > int cnxk_eth_macsec_session_destroy(struct cnxk_eth_dev *dev, struct rte= _security_session *sess); > -- > 2.25.1 >