From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD94EA04BA; Mon, 5 Oct 2020 11:29:52 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D2F181B28E; Mon, 5 Oct 2020 11:29:50 +0200 (CEST) Received: from mail-io1-f68.google.com (mail-io1-f68.google.com [209.85.166.68]) by dpdk.org (Postfix) with ESMTP id 5F82E4C8E for ; Mon, 5 Oct 2020 11:29:49 +0200 (CEST) Received: by mail-io1-f68.google.com with SMTP id d197so8399406iof.0 for ; Mon, 05 Oct 2020 02:29:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=D60/nP3noHEGzWPkryqzZKzVqn8hUQw/RM9a97q6MU4=; b=al9Lfdv4WGywBK78YKkwrFruDEi2rWEDTRknlqb05kCS8dhQ/W4Nk9k8FQ8qY/hyMb kkiSMvEuGcC0jJB6CsSYpfwhkJezj5wop8FCZ0AHgaXC9F6BLa/NFNL21OC6VZApzdO9 HroIoaCQ2+D7dCQJkVlIgyykb1L7caZ5e06/7rz1IzlbvNDYbFvdBNyHq5sZI9dsTSQB FwIE7cAwgUMqoXoRmXqmoYuV3PKqKscG7HuZrrwdwMFMAeCudySds0PO5fWacpd2/pOK BGdIBY7O9AKZsXP0AGNvurloHxLtscRXijniPCCQHCB1g1fPKzMV+ChHCUKovvgW1L1A E1tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=D60/nP3noHEGzWPkryqzZKzVqn8hUQw/RM9a97q6MU4=; b=jqi1Dd05evARk551skxY5reVIBJZJncrR4YrIHEitRcnvaAj1sHJ+uKyUc6kEXVEvc MCVRvKgCjVK8QZ9xHHYAczXmRWSscI3mpUyUZ4a+Dwn3GtIoWzajVWRP45giERRJgVHC QWbvHt1pDi/DecclX6NNP7C8+40WWxR5w9/CCk5MR8V9KIzCL5w+oiFNqKU9ESJkio7r 2/ZovGpqeEBIZJacqsy+F5BlqmlQELBU7KF/8QtSIUdu+KQz5I8d2AZBk9puZ6sTIaCR niihcmMCH35Fr4W67XP07rRNEETKdbHP2tH0tEzjYLvFIiJVZ3GrFBVis6MoNnvEZWog s92Q== X-Gm-Message-State: AOAM531ocvh1/2ZdAgZvgiwFLbBBGW1fWL2FlYg4Gy5mdqHl8n7/nInN Gi5tj4eBImR8WQm5VMM7tUvlqdQeycFJvfWWqns= X-Google-Smtp-Source: ABdhPJz6Ote2y/rPOOmCLadF0YhnnZlS1YkZAb3wGP8CxHrzwX/9lxd20I0d56WQNTqFXLdX2uBTrna5bq/d98Okeus= X-Received: by 2002:a6b:5019:: with SMTP id e25mr7789614iob.123.1601890187635; Mon, 05 Oct 2020 02:29:47 -0700 (PDT) MIME-Version: 1.0 References: <1600196207-31258-1-git-send-email-hkalra@marvell.com> <1600196207-31258-2-git-send-email-hkalra@marvell.com> In-Reply-To: <1600196207-31258-2-git-send-email-hkalra@marvell.com> From: Jerin Jacob Date: Mon, 5 Oct 2020 14:59:31 +0530 Message-ID: To: Harman Kalra Cc: Pavan Nikhilesh , Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 2/4] event/octeontx2: improve single flow performance X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Sep 16, 2020 at 12:27 AM Harman Kalra wrote: > > From: Pavan Nikhilesh > > Improve single flow performance by moving the point of coherence > to the end of transmit sequence. > > Signed-off-by: Pavan Nikhilesh > --- > drivers/event/octeontx2/otx2_worker.h | 35 +++++++++++++++++---------- > drivers/net/octeontx2/otx2_tx.h | 18 ++++++++++++++ > 2 files changed, 40 insertions(+), 13 deletions(-) Failed[1] to apply this patch on dpdk-next-eventdev Could you rebase this patch to dpdk-next-eventdev tree and send an update version? [1] [for-main][dpdk-next-eventdev] $ git am -3 /tmp/r/2-4-event-octeontx2-improve-single-flow-performance Applying: event/octeontx2: improve single flow performance error: sha1 information is lacking or useless (drivers/event/octeontx2/otx2_worker.h). error: could not build fake ancestor Patch failed at 0001 event/octeontx2: improve single flow performance hint: Use 'git am --show-current-patch=diff' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort" > > diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h > index 1bf8afedf..32d611458 100644 > --- a/drivers/event/octeontx2/otx2_worker.h > +++ b/drivers/event/octeontx2/otx2_worker.h > @@ -247,15 +247,6 @@ otx2_ssogws_head_wait(struct otx2_ssogws *ws) > #endif > } > > -static __rte_always_inline void > -otx2_ssogws_order(struct otx2_ssogws *ws, const uint8_t wait_flag) > -{ > - if (wait_flag) > - otx2_ssogws_head_wait(ws); > - > - rte_cio_wmb(); > -} > - > static __rte_always_inline const struct otx2_eth_txq * > otx2_ssogws_xtract_meta(struct rte_mbuf *m, > const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT]) > @@ -287,10 +278,9 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], > return otx2_sec_event_tx(ws, ev, m, txq, flags); > } > > - rte_prefetch_non_temporal(&txq_data[m->port][0]); > /* Perform header writes before barrier for TSO */ > otx2_nix_xmit_prepare_tso(m, flags); > - otx2_ssogws_order(ws, !ev->sched_type); > + rte_cio_wmb(); > txq = otx2_ssogws_xtract_meta(m, txq_data); > otx2_ssogws_prepare_pkt(txq, m, cmd, flags); > > @@ -298,12 +288,31 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], > const uint16_t segdw = otx2_nix_prepare_mseg(m, cmd, flags); > otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0], > m->ol_flags, segdw, flags); > - otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr, txq->io_addr, segdw); > + if (!ev->sched_type) { > + otx2_nix_xmit_mseg_prep_lmt(cmd, txq->lmt_addr, segdw); > + otx2_ssogws_head_wait(ws); > + if (otx2_nix_xmit_submit_lmt(txq->io_addr) == 0) > + otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr, > + txq->io_addr, segdw); > + } else { > + otx2_nix_xmit_mseg_one(cmd, txq->lmt_addr, txq->io_addr, > + segdw); > + } > } else { > /* Passing no of segdw as 4: HDR + EXT + SG + SMEM */ > otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0], > m->ol_flags, 4, flags); > - otx2_nix_xmit_one(cmd, txq->lmt_addr, txq->io_addr, flags); > + > + if (!ev->sched_type) { > + otx2_nix_xmit_prep_lmt(cmd, txq->lmt_addr, flags); > + otx2_ssogws_head_wait(ws); > + if (otx2_nix_xmit_submit_lmt(txq->io_addr) == 0) > + otx2_nix_xmit_one(cmd, txq->lmt_addr, > + txq->io_addr, flags); > + } else { > + otx2_nix_xmit_one(cmd, txq->lmt_addr, txq->io_addr, > + flags); > + } > } > > otx2_write64(0, ws->swtag_flush_op); > diff --git a/drivers/net/octeontx2/otx2_tx.h b/drivers/net/octeontx2/otx2_tx.h > index 3c4317092..caf170fd1 100644 > --- a/drivers/net/octeontx2/otx2_tx.h > +++ b/drivers/net/octeontx2/otx2_tx.h > @@ -383,6 +383,18 @@ otx2_nix_xmit_one(uint64_t *cmd, void *lmt_addr, > } while (lmt_status == 0); > } > > +static __rte_always_inline void > +otx2_nix_xmit_prep_lmt(uint64_t *cmd, void *lmt_addr, const uint32_t flags) > +{ > + otx2_lmt_mov(lmt_addr, cmd, otx2_nix_tx_ext_subs(flags)); > +} > + > +static __rte_always_inline uint64_t > +otx2_nix_xmit_submit_lmt(const rte_iova_t io_addr) > +{ > + return otx2_lmt_submit(io_addr); > +} > + > static __rte_always_inline uint16_t > otx2_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags) > { > @@ -453,6 +465,12 @@ otx2_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags) > return segdw; > } > > +static __rte_always_inline void > +otx2_nix_xmit_mseg_prep_lmt(uint64_t *cmd, void *lmt_addr, uint16_t segdw) > +{ > + otx2_lmt_mov_seg(lmt_addr, (const void *)cmd, segdw); > +} > + > static __rte_always_inline void > otx2_nix_xmit_mseg_one(uint64_t *cmd, void *lmt_addr, > rte_iova_t io_addr, uint16_t segdw) > -- > 2.18.0 >