From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A4760A034C; Fri, 25 Feb 2022 11:36:36 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 713A64115C; Fri, 25 Feb 2022 11:36:36 +0100 (CET) Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) by mails.dpdk.org (Postfix) with ESMTP id EB11F4068B for ; Fri, 25 Feb 2022 11:36:34 +0100 (CET) Received: by mail-io1-f54.google.com with SMTP id h16so5931556iol.11 for ; Fri, 25 Feb 2022 02:36:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dlyDSGNKKTwQcOX9Vvfd9EYXRRbA4vjJ7q5Y4lTkQZY=; b=ZtHoT8Z91DAbz3Xd4vRXkMyAR6HVvHO1IE1tMU2RRt08RFJJHliwdpTH3iKHwpZ1cE KHfed4aJ2G4c/fikSd6fSnZuwYAX84/ofuTKFtXc9hfmug0BwKoFU81ZrwsifUMIiOoj brWk6v3CuIjGRkzBqbS535+3oOZrr7oiix1wey2MnY+v16ajYdYyfDVxAl1lZoqX0Nzo OCP/ZDi43zaoZj9pnwmwSO7cxBVlpcQq03++FB5k/dhT9pTS+wsNxw8K1ORWwhRwYx6i xSOqD6HuAy4J9yqAsfMhQHtBLhXfnXR4nxdpo7/zf8GW5hbI//u+BBcI5XIlCQzkWnqy QP0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dlyDSGNKKTwQcOX9Vvfd9EYXRRbA4vjJ7q5Y4lTkQZY=; b=jUNkCgQNp+YBluki4aWsulK6fcnZPXbQn//HUEnftJlaS1YruqBmjP7Mc4PZF9mNUa jq6L8pUULLvVbNHmYhRxLOCVR8eERbwxRAEUad6Za93SuivqPjtyyZJIZE/s+diO3fKe bxyFmO0VvyuqIWJv0l86qVb37T52dSWA+cU679GFYg7XyDvkatghARdiHhygH6ouJ9J3 MaNoqw8YFpasBi3GqOx3Z6aazYqkR6O7D+qQsuX0Y2HF1cPku+wHVtV6FOxAzBaXyrTa rMAMghZs2GF7mfDZvRsvNsEns+c2sN06U2xuedJRxsAH5OsHVNcLbkc06h3HiHLc/t3q WW6w== X-Gm-Message-State: AOAM530K0l5TGuLQibcYoffkaFlNfzmvU/UGDdheRIQBSThohdNexwFY uqQQ+ECicq6y/I86NlY2lzsRAyPIVJiNz2hhgiVQZdghuepPug== X-Google-Smtp-Source: ABdhPJxF3TajyDkm3WVmo93npZOZEMgT95z0IfXYwvIAoSDLVojcyOXmi2F4SjoxLQPxOnHHid+y7Pb77vXFsf6KbF4= X-Received: by 2002:a02:aca:0:b0:314:9da8:7be0 with SMTP id 193-20020a020aca000000b003149da87be0mr5598576jaw.280.1645785394261; Fri, 25 Feb 2022 02:36:34 -0800 (PST) MIME-Version: 1.0 References: <20220224104236.1425812-1-tduszynski@marvell.com> <20220225103411.1633560-1-tduszynski@marvell.com> In-Reply-To: <20220225103411.1633560-1-tduszynski@marvell.com> From: Jerin Jacob Date: Fri, 25 Feb 2022 16:06:08 +0530 Message-ID: Subject: Re: [dpdk-dev] [PATCH v2] common/cnxk: support CNF95xx B0 variant To: Tomasz Duszynski Cc: dpdk-dev , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ferruh Yigit , Jerin Jacob Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Feb 25, 2022 at 4:04 PM Tomasz Duszynski wrote: > > Add CNF95xx B0 variant to the list of supported models. > > Signed-off-by: Tomasz Duszynski > Reviewed-by: Jerin Jacob > --- > v2: > - Update release notes for new device support (Ferruh) Applied to dpdk-next-net-mrvl/for-next-net. Thanks > > doc/guides/rel_notes/release_22_03.rst | 1 + > drivers/common/cnxk/roc_model.c | 1 + > drivers/common/cnxk/roc_model.h | 6 ++++-- > 3 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/doc/guides/rel_notes/release_22_03.rst b/doc/guides/rel_notes/release_22_03.rst > index 54563106d1..43c4db65c3 100644 > --- a/doc/guides/rel_notes/release_22_03.rst > +++ b/doc/guides/rel_notes/release_22_03.rst > @@ -135,6 +135,7 @@ New Features > * Added queue based priority flow control support for CN9K & CN10K. > * Added support for IP reassembly for inline inbound IPsec packets. > * Added support for packet marking in traffic manager. > + * Added support for CNF95xx B0 variant SoC. > > * **Added an API for private user data in asymmetric crypto session.** > > diff --git a/drivers/common/cnxk/roc_model.c b/drivers/common/cnxk/roc_model.c > index 49617c02b7..4120029541 100644 > --- a/drivers/common/cnxk/roc_model.c > +++ b/drivers/common/cnxk/roc_model.c > @@ -56,6 +56,7 @@ static const struct model_db { > {VENDOR_CAVIUM, PART_95xx, 1, 0, ROC_MODEL_CNF95xx_B0, "cnf95xx_b0"}, > {VENDOR_CAVIUM, PART_95xxN, 0, 0, ROC_MODEL_CNF95xxN_A0, "cnf95xxn_a0"}, > {VENDOR_CAVIUM, PART_95xxN, 0, 1, ROC_MODEL_CNF95xxN_A0, "cnf95xxn_a1"}, > + {VENDOR_CAVIUM, PART_95xxN, 1, 0, ROC_MODEL_CNF95xxN_B0, "cnf95xxn_b0"}, > {VENDOR_CAVIUM, PART_95O, 0, 0, ROC_MODEL_CNF95xxO_A0, "cnf95O_a0"}, > {VENDOR_CAVIUM, PART_95xxMM, 0, 0, ROC_MODEL_CNF95xxMM_A0, > "cnf95xxmm_a0"}}; > diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h > index cee06779bc..4567566169 100644 > --- a/drivers/common/cnxk/roc_model.h > +++ b/drivers/common/cnxk/roc_model.h > @@ -19,6 +19,7 @@ struct roc_model { > #define ROC_MODEL_CNF95xxN_A0 BIT_ULL(12) > #define ROC_MODEL_CNF95xxO_A0 BIT_ULL(13) > #define ROC_MODEL_CNF95xxN_A1 BIT_ULL(14) > +#define ROC_MODEL_CNF95xxN_B0 BIT_ULL(15) > #define ROC_MODEL_CN98xx_A0 BIT_ULL(16) > #define ROC_MODEL_CN106xx_A0 BIT_ULL(20) > #define ROC_MODEL_CNF105xx_A0 BIT_ULL(21) > @@ -39,11 +40,12 @@ struct roc_model { > (ROC_MODEL_CN96xx_Ax | ROC_MODEL_CN96xx_C0 | ROC_MODEL_CNF95xx_A0 | \ > ROC_MODEL_CNF95xx_B0 | ROC_MODEL_CNF95xxMM_A0 | \ > ROC_MODEL_CNF95xxO_A0 | ROC_MODEL_CNF95xxN_A0 | ROC_MODEL_CN98xx_A0 | \ > - ROC_MODEL_CNF95xxN_A1) > + ROC_MODEL_CNF95xxN_A1 | ROC_MODEL_CNF95xxN_B0) > #define ROC_MODEL_CNF9K \ > (ROC_MODEL_CNF95xx_A0 | ROC_MODEL_CNF95xx_B0 | \ > ROC_MODEL_CNF95xxMM_A0 | ROC_MODEL_CNF95xxO_A0 | \ > - ROC_MODEL_CNF95xxN_A0 | ROC_MODEL_CNF95xxN_A1) > + ROC_MODEL_CNF95xxN_A0 | ROC_MODEL_CNF95xxN_A1 | \ > + ROC_MODEL_CNF95xxN_B0) > > #define ROC_MODEL_CN106xx (ROC_MODEL_CN106xx_A0) > #define ROC_MODEL_CNF105xx (ROC_MODEL_CNF105xx_A0) > -- > 2.35.1 >