From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1BB5B45BB1; Thu, 24 Oct 2024 13:11:10 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EA62340281; Thu, 24 Oct 2024 13:11:09 +0200 (CEST) Received: from mail-qt1-f182.google.com (mail-qt1-f182.google.com [209.85.160.182]) by mails.dpdk.org (Postfix) with ESMTP id 4CAC24003C for ; Thu, 24 Oct 2024 13:11:08 +0200 (CEST) Received: by mail-qt1-f182.google.com with SMTP id d75a77b69052e-46096aadaf0so5014001cf.2 for ; Thu, 24 Oct 2024 04:11:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729768267; x=1730373067; darn=dpdk.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=IqaV4h4WNLzJSN9tKz/Z/P9FWd89R7zwWmw5cM6MD5Q=; b=gbl5H4Xt3gkYg1KJFUoKKdyLzc+wOmsvPmdgGQ67YmN2O1lJG5ZsgDAdlFggVtfvVg RiJIHVPandM4czywUZLP38/9pmsRuTNUkPAAazBd8eq/FA931O771nZBb57J72kmAe40 OK/ZJvtTKkOHyNbGm3fQF6ucUZvqP0O8OIKAaTRvbo9TUwJDPA6uRc7mRIbQD0Ydf2na VgoTJjZ6vPlL3ESmrL54bCTlp4mKjLt5zELv8VuAeqPcrVQDbrCmfHkm68ZUjr47Cdix whSUTPi9oOicP0RhB+6/KMNwuX7iFKGlxd3fulLRNmQPQDlplTL8UxDRsN3RPamU3Xua wPoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729768267; x=1730373067; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IqaV4h4WNLzJSN9tKz/Z/P9FWd89R7zwWmw5cM6MD5Q=; b=c5I6cYLonu+N8yj1tBQ5vOrxTPhlgZ+GHbOZMmkFjHybCkVKhaWupO4QxYFUhsxM+R A1o32bOuHdhBTKroUZmSQcBJ61msxrOZOWhlhUphkyOTitjt7pmB18VpNhOzbyPeU+6d 9+cY0yPpzQBQoia/f8XnT9gm6BOn89hg6Hk3iYGLyocsWbNZ8o865sObPQToBxtZ+WaU Ws94kUEx78p/TQ+QMRby+gZTGu7fh0LK5AAAu4Ylkzuu8w/v8rJ40z9r8ETW4l5zzgxb wz8dhhpsHIuwsRsh63PTMhi5TryoVe9t9MAf28M7joMtAEombyGoUMY9eoqoMUY2n3Te ITjQ== X-Forwarded-Encrypted: i=1; AJvYcCVxLVD9xsiHGT/EJjdf4AeTHrxoKpd4xhsbB8B4dTG89vBcMgo5LfET5nTt8rcQ9D2HcoA=@dpdk.org X-Gm-Message-State: AOJu0YwfWeQUdXLy7dMZv8I0BuoxtWz2WiQXCotsf76KftS60Dnl4bP/ Tb548p2k2iGIBZMjZaTfUYLegiD2sR+PhvhZA6Aatv/w66P7tjWPIRLys5iuncyw8NDgn6fVJmX u06W3uo/OcLcXEWD3uXcvSTeLyeAMVjkV X-Google-Smtp-Source: AGHT+IGGeoiGC8N69BgjjiR7WRK9b8NEZiwQQ7HmDYbv1IcPpVtdSt7LfvWOihMpWwrBzdKgchGNDFxQpFeb6zKFjTU= X-Received: by 2002:a05:622a:112:b0:460:ac33:431c with SMTP id d75a77b69052e-46114745ccbmr73565671cf.53.1729768267548; Thu, 24 Oct 2024 04:11:07 -0700 (PDT) MIME-Version: 1.0 References: <20241014110608.2170844-1-sthotton@marvell.com> In-Reply-To: <20241014110608.2170844-1-sthotton@marvell.com> From: Jerin Jacob Date: Thu, 24 Oct 2024 16:40:40 +0530 Message-ID: Subject: Re: [PATCH] common/cnxk: allow enabling IOVA field in mbuf To: Shijith Thotton Cc: jerinj@marvell.com, pbhagavatula@marvell.com, dev@dpdk.org, Wathsala Vithanage , Bruce Richardson , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra , Thomas Monjalon , David Marchand Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, Oct 14, 2024 at 4:37=E2=80=AFPM Shijith Thotton wrote: > > Value of RTE_IOVA_IN_MBUF was always disabled on cnxk platforms, as IOVA > in the mbuf is not required. This change modifies that behavior, > allowing RTE_IOVA_IN_MBUF to be enabled if the build option > -Denable_iova_as_pa=3Dtrue is explicitly specified. > > Signed-off-by: Shijith Thotton > --- > > diff --git a/config/arm/meson.build b/config/arm/meson.build > index 012935d5d7..ca54524376 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -439,10 +439,7 @@ soc_cn9k =3D { > 'description': 'Marvell OCTEON 9', > 'implementer': '0x43', > 'part_number': '0xb2', > - 'numa': false, > - 'flags': [ > - ['RTE_IOVA_IN_MBUF', 0] > - ] > + 'numa': false > } > > soc_cn10k =3D { > @@ -451,8 +448,7 @@ soc_cn10k =3D { > 'flags': [ > ['RTE_MAX_LCORE', 24], > ['RTE_MAX_NUMA_NODES', 1], > - ['RTE_MEMPOOL_ALIGN', 128], > - ['RTE_IOVA_IN_MBUF', 0] > + ['RTE_MEMPOOL_ALIGN', 128] > ], > 'part_number': '0xd49', > 'extra_march_features': ['crypto'], > diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.= build > index dc2ddf1f20..bba780e750 100644 > --- a/drivers/common/cnxk/meson.build > +++ b/drivers/common/cnxk/meson.build > @@ -108,4 +108,13 @@ deps +=3D ['bus_pci', 'net', 'telemetry'] > > require_iova_in_mbuf =3D false > > +cnxk_socs =3D ['cn9k', 'cn10k', 'cn20k'] > + > +# Enable RTE_IOVA_IN_MBUF only if enable_iova_as_pa is set explicitly, e= lse disable it > +if meson.version().version_compare('>=3D1.1.0') > + if '-Denable_iova_as_pa' not in meson.build_options() and soc_type i= n cnxk_socs > + dpdk_conf.set10('RTE_IOVA_IN_MBUF', false) > + endif > +endif Since this is added in driver/common/cnxk, it will be late to decide. For example, Following PMDs will have mis match: common - cpt, dpaax, idpf, ionic bus - cdx, dpaa, fslmc, ifpga, uacce I think, this check needs to move up in the chain. @Richardson, Bruce Any thoughts on cleanly adding this kind of check in top-level meson objects? > + > annotate_locks =3D false > -- > 2.25.1 >