From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9F7E3A0543; Mon, 13 Jun 2022 08:31:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3BB7A4021E; Mon, 13 Jun 2022 08:31:10 +0200 (CEST) Received: from mail-qk1-f176.google.com (mail-qk1-f176.google.com [209.85.222.176]) by mails.dpdk.org (Postfix) with ESMTP id 2DBA240150 for ; Mon, 13 Jun 2022 08:31:08 +0200 (CEST) Received: by mail-qk1-f176.google.com with SMTP id 15so3381260qki.6 for ; Sun, 12 Jun 2022 23:31:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=x1kLSd3Shi/t+IYZFG4R7Tg3AqyaniD0XZ/QmmC/TM8=; b=cj1b5/RDDx06DzJtbm32mvhs8wrnuLsB1/+GWBaYeT6LZhA+RPDoZPcNY0k6wsH5Zd pic1EKdOotwoxEcaHZAirFlKYjExAT2fIZT0rdyOFW/yDQLAdx7nLqwgdjo+0/QF+UWq GbP76HXyt82jFQ5nb0N/quWth6QGTwCdD3RCw4i0bHME6sqesoQ6j214Xbe75JfNbS5F wAHowVulOtU67zP3ktwrudECufQIEVOvRftLrE0dFwYd3Ao/uokgZBnd2ofytVON//6F uOeze0y7pwZRL1VjRQQcPBzEYvxLQcZ26gOKl/u7RKGsN9IscftDdmrJvAXHolAaAoNu fbpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=x1kLSd3Shi/t+IYZFG4R7Tg3AqyaniD0XZ/QmmC/TM8=; b=ggTAOo58GBkVlbwKemCSPgZdwXamaMB8UakioP25N+2dXUgzit/efTFez+mw3ig9Ai JVGCpfGAOXT6BJTamblZ0ZgVdYfdTPnw84tAjqbwrq73l36VyXTZ4a6X/EboRJ/cuRfb oRAuZdOTnwVi7geA/5IJPyyEUA1BJdh5K22pfPnwGDsqgnkVdbZ8lFjeIcmfdVRSRvXH wn++abtKtjMdHfVPKVgoBLy+nuyjI3SNddx3iLEJdgZXa7UMlKbCQM3JGlQkHtPqjl5N oO2do6EexO1+jV42QT1VuMWaM3uqxGYMBbkvoJqth60U8FsWX5Hlnwv6tT7AZPK0X6hG G5Jg== X-Gm-Message-State: AOAM530hRF041SLdv3QV0xwA29CCzP6NhKvBlp3/uTF2/cQWOC1Y424B 11Xg27ew4ieinnxn4n0lLKfWXkQlZ60A9VrmtPQ= X-Google-Smtp-Source: ABdhPJzrTNLrOcE3Av1pvd95YZoSyI6uBGKVRWxf/4EYOlI/TUPaaym9nC4MXs3AstBr4Zkil8Yj9ITGZQ9SQuFKli8= X-Received: by 2002:a37:6611:0:b0:6a6:ac06:7cf with SMTP id a17-20020a376611000000b006a6ac0607cfmr30710315qkc.22.1655101867539; Sun, 12 Jun 2022 23:31:07 -0700 (PDT) MIME-Version: 1.0 References: <20220409151849.1007602-1-timothy.mcdaniel@intel.com> <20220610162758.2713972-1-timothy.mcdaniel@intel.com> In-Reply-To: <20220610162758.2713972-1-timothy.mcdaniel@intel.com> From: Jerin Jacob Date: Mon, 13 Jun 2022 12:00:40 +0530 Message-ID: Subject: Re: [PATCH v8] event/dlb2: add support for single 512B write of 4 QEs To: Timothy McDaniel Cc: Jerin Jacob , "Richardson, Bruce" , dpdk-dev , Kent Wires Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Jun 10, 2022 at 9:58 PM Timothy McDaniel wrote: > > On Xeon, 512b accesses are available, so movdir64 instruction is able to > perform 512b read and write to DLB producer port. In order for movdir64 > to be able to pull its data from store buffers (store-buffer-forwarding) > (before actual write), data should be in single 512b write format. > This commit add change when code is built for Xeon with 512b AVX support > to make single 512b write of all 4 QEs instead of 4x64b writes. > > Signed-off-by: Timothy McDaniel > Acked-by: Kent Wires @McDaniel, Timothy Some cosmetic comments are below. Good to merge the next version. @Richardson, Bruce Hope you are OK with this version patch. > +#ifdef CC_AVX512_SUPPORT I think, We can avoid putting it under CC_AVX512_SUPPORT to avoid clutter. > + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512VL) && > + rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512) > + ev_port->qm_port.use_avx512 = true; > + else > + ev_port->qm_port.use_avx512 = false; > +#endif > return 0; > } > > @@ -2457,21 +2464,6 @@ dlb2_eventdev_start(struct rte_eventdev *dev) > return 0; > } > > diff --git a/drivers/event/dlb2/dlb2_avx512.c b/drivers/event/dlb2/dlb2_avx512.c > new file mode 100644 > index 0000000000..ce2d006006 > --- /dev/null > +++ b/drivers/event/dlb2/dlb2_avx512.c > @@ -0,0 +1,267 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2016-2020 Intel Corporation Fix copyright year. > + */ > + > diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h > index 4a06d649ab..e8d2d0c656 100644 > --- a/drivers/event/dlb2/dlb2_priv.h > +++ b/drivers/event/dlb2/dlb2_priv.h > @@ -377,6 +377,9 @@ struct dlb2_port { > struct dlb2_eventdev_port *ev_port; /* back ptr */ > bool use_scalar; /* force usage of scalar code */ > uint16_t hw_credit_quanta; > +#ifdef CC_AVX512_SUPPORT Not really need to be under compile time to avoid the compile-time clutter. > + bool use_avx512; > +#endif > }; > > diff --git a/drivers/event/dlb2/dlb2_sse.c b/drivers/event/dlb2/dlb2_sse.c > new file mode 100644 > index 0000000000..82f6588e2a > --- /dev/null > +++ b/drivers/event/dlb2/dlb2_sse.c > @@ -0,0 +1,219 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2016-2020 Intel Corporation Fix copyright year. > diff --git a/drivers/event/dlb2/dlb2_sve.c b/drivers/event/dlb2/dlb2_sve.c > new file mode 100644 > index 0000000000..82f6588e2a > --- /dev/null > +++ b/drivers/event/dlb2/dlb2_sve.c > @@ -0,0 +1,219 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2016-2020 Intel Corporation Fix copyright year.