From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 582D0A04A6; Mon, 24 Jan 2022 10:07:35 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4A208410F1; Mon, 24 Jan 2022 10:07:35 +0100 (CET) Received: from mail-io1-f45.google.com (mail-io1-f45.google.com [209.85.166.45]) by mails.dpdk.org (Postfix) with ESMTP id DD4CB40040 for ; Mon, 24 Jan 2022 10:07:33 +0100 (CET) Received: by mail-io1-f45.google.com with SMTP id i62so2932471ioa.1 for ; Mon, 24 Jan 2022 01:07:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Mb7yaZyPwocBhDeuj8dh3X6s1Kgk8yORrYHG9J+edfs=; b=ak4eSYFGxeRbPMGqxhOmC5wLOsMZM56qUv1as8hAlRXVQda6gPwCugnmv6VS5C5VKe c6JwSpJoSOuwLcQraBQpIZexOVfx5SbLEn5RbQ1NHVBAxr4YHPnJn7MdhfTSTLZSVHfK xhzTixcsyMqe2OdEa7ayrQVkgyCkXOhJE85uiL3GH1OHAVj9sfe6XGjXNTZAUStLKnDM wtReat8FiR8DiKxIX6Fiz+T6t511Hn8370QYSVt7K8KJrWgIVWACEYhrnNfl+qhv4KaB P/czmZgv1uDC0o2OiC3im49cziSneSrdcwpjSosAFya6kirZSH37zPyqDfpYOAzwl8Wo J/XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Mb7yaZyPwocBhDeuj8dh3X6s1Kgk8yORrYHG9J+edfs=; b=zhNDTdgphxVepygwp+HvlJOvSSm5YlKp4g6bGZ3p3KuSTQbsJW1kQR9ngpSk4B07aT C0lQ4NkPL6aRjXOERHIABR/b/2MolmSrkf8qm+3DmOxbhMd6XxMHSerrvoRFKU1Xv4VW nKDtVplC+7QXWTGaTtOl+McGDAl5CF1BsF1C9JTCYipyYM4bE794rKXEyNDqU5ZLlHVU pJS6W9wrDVpuiRARlXItaNb2Y21azAbluckd6jykAaPCUKyFzvOu1pUagj2LD5B7vJOp frBNfdHljllRQPRwLFEpFuXV07CQi5GARPvgz4AZsN5Rm2D/5+MeKQwZWPjHdWT8G0od z9Ig== X-Gm-Message-State: AOAM533FdtfGU0wx87g7D7d2wWNwqZ4mUTkYElMj9sAN4GN9h3Ki/b4b 7ayTzZCIol8bPg/5pb/q1M/PgioyVrAI+YKpHX4= X-Google-Smtp-Source: ABdhPJw3jfGP9DgU/WT2Q6eFqt0i//ouZPnfXQjC/WpPtvke+9awfkPIZ+lHbxrWjAJzHefdul3YdJEnoLq6jK/7JRY= X-Received: by 2002:a02:bb87:: with SMTP id g7mr6355464jan.79.1643015253269; Mon, 24 Jan 2022 01:07:33 -0800 (PST) MIME-Version: 1.0 References: <20211213205633.5724-1-pbhagavatula@marvell.com> In-Reply-To: <20211213205633.5724-1-pbhagavatula@marvell.com> From: Jerin Jacob Date: Mon, 24 Jan 2022 14:37:07 +0530 Message-ID: Subject: Re: [PATCH] common/cnxk: use XAQ create API for inline device To: Pavan Nikhilesh Cc: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , dpdk-dev Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, Dec 14, 2021 at 2:26 AM wrote: > > From: Pavan Nikhilesh > > Use the XAQ aura create and free API while initializing the aura-> AURA > inline device. > > Signed-off-by: Pavan Nikhilesh Acked-by: Jerin Jacob Applied to dpdk-next-net-eventdev/for-main. Thanks > --- > drivers/common/cnxk/roc_nix_debug.c | 4 +- > drivers/common/cnxk/roc_nix_inl_dev.c | 53 ++++++-------------------- > drivers/common/cnxk/roc_nix_inl_priv.h | 3 +- > 3 files changed, 15 insertions(+), 45 deletions(-) > > diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c > index 266935a6c5..5886650d6e 100644 > --- a/drivers/common/cnxk/roc_nix_debug.c > +++ b/drivers/common/cnxk/roc_nix_debug.c > @@ -1257,8 +1257,8 @@ roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev) > nix_dump(" \txaq_buf_size = %u", inl_dev->xaq_buf_size); > nix_dump(" \txae_waes = %u", inl_dev->xae_waes); > nix_dump(" \tiue = %u", inl_dev->iue); > - nix_dump(" \txaq_aura = 0x%" PRIx64, inl_dev->xaq_aura); > - nix_dump(" \txaq_mem = 0x%p", inl_dev->xaq_mem); > + nix_dump(" \txaq_aura = 0x%" PRIx64, inl_dev->xaq.aura_handle); > + nix_dump(" \txaq_mem = 0x%p", inl_dev->xaq.mem); > > nix_dump(" \tinl_dev_rq:"); > roc_nix_rq_dump(&inl_dev->rq); > diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c > index 10912a6c93..dd93765a2b 100644 > --- a/drivers/common/cnxk/roc_nix_inl_dev.c > +++ b/drivers/common/cnxk/roc_nix_inl_dev.c > @@ -5,8 +5,6 @@ > #include "roc_api.h" > #include "roc_priv.h" > > -#define XAQ_CACHE_CNT 0x7 > - > /* Default Rx Config for Inline NIX LF */ > #define NIX_INL_LF_RX_CFG \ > (ROC_NIX_LF_RX_CFG_DROP_RE | ROC_NIX_LF_RX_CFG_L2_LEN_ERR | \ > @@ -220,10 +218,8 @@ nix_inl_sso_setup(struct nix_inl_dev *inl_dev) > { > struct sso_lf_alloc_rsp *sso_rsp; > struct dev *dev = &inl_dev->dev; > - uint32_t xaq_cnt, count, aura; > uint16_t hwgrp[1] = {0}; > - struct npa_pool_s pool; > - uintptr_t iova; > + uint32_t xae_cnt; > int rc; > > /* Alloc SSOW LF */ > @@ -244,41 +240,17 @@ nix_inl_sso_setup(struct nix_inl_dev *inl_dev) > inl_dev->xae_waes = sso_rsp->xaq_wq_entries; > inl_dev->iue = sso_rsp->in_unit_entries; > > - /* Create XAQ pool */ > - xaq_cnt = XAQ_CACHE_CNT; > - xaq_cnt += inl_dev->iue / inl_dev->xae_waes; > - plt_sso_dbg("Configuring %d xaq buffers", xaq_cnt); > - > - inl_dev->xaq_mem = plt_zmalloc(inl_dev->xaq_buf_size * xaq_cnt, > - inl_dev->xaq_buf_size); > - if (!inl_dev->xaq_mem) { > - rc = NIX_ERR_NO_MEM; > - plt_err("Failed to alloc xaq buf mem"); > - goto free_sso; > - } > - > - memset(&pool, 0, sizeof(struct npa_pool_s)); > - pool.nat_align = 1; > - rc = roc_npa_pool_create(&inl_dev->xaq_aura, inl_dev->xaq_buf_size, > - xaq_cnt, NULL, &pool); > + xae_cnt = inl_dev->iue; > + rc = sso_hwgrp_init_xaq_aura(dev, &inl_dev->xaq, xae_cnt, > + inl_dev->xae_waes, inl_dev->xaq_buf_size, > + 1); > if (rc) { > - plt_err("Failed to alloc aura for XAQ, rc=%d", rc); > - goto free_mem; > - } > - > - /* Fill the XAQ buffers */ > - iova = (uint64_t)inl_dev->xaq_mem; > - for (count = 0; count < xaq_cnt; count++) { > - roc_npa_aura_op_free(inl_dev->xaq_aura, 0, iova); > - iova += inl_dev->xaq_buf_size; > + plt_err("Failed to alloc SSO XAQ aura, rc=%d", rc); > + goto free_sso; > } > - roc_npa_aura_op_range_set(inl_dev->xaq_aura, (uint64_t)inl_dev->xaq_mem, > - iova); > - > - aura = roc_npa_aura_handle_to_aura(inl_dev->xaq_aura); > > /* Setup xaq for hwgrps */ > - rc = sso_hwgrp_alloc_xaq(dev, aura, 1); > + rc = sso_hwgrp_alloc_xaq(dev, inl_dev->xaq.aura_handle, 1); > if (rc) { > plt_err("Failed to setup hwgrp xaq aura, rc=%d", rc); > goto destroy_pool; > @@ -302,11 +274,7 @@ nix_inl_sso_setup(struct nix_inl_dev *inl_dev) > release_xaq: > sso_hwgrp_release_xaq(&inl_dev->dev, 1); > destroy_pool: > - roc_npa_pool_destroy(inl_dev->xaq_aura); > - inl_dev->xaq_aura = 0; > -free_mem: > - plt_free(inl_dev->xaq_mem); > - inl_dev->xaq_mem = NULL; > + sso_hwgrp_free_xaq_aura(dev, &inl_dev->xaq, 0); > free_sso: > sso_lf_free(dev, SSO_LF_TYPE_HWGRP, 1); > free_ssow: > @@ -335,6 +303,9 @@ nix_inl_sso_release(struct nix_inl_dev *inl_dev) > sso_lf_free(&inl_dev->dev, SSO_LF_TYPE_HWS, 1); > sso_lf_free(&inl_dev->dev, SSO_LF_TYPE_HWGRP, 1); > > + /* Free the XAQ aura */ > + sso_hwgrp_free_xaq_aura(&inl_dev->dev, &inl_dev->xaq, 0); > + > return 0; > } > > diff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h > index be53a3fa81..2cdab6dc7a 100644 > --- a/drivers/common/cnxk/roc_nix_inl_priv.h > +++ b/drivers/common/cnxk/roc_nix_inl_priv.h > @@ -27,8 +27,7 @@ struct nix_inl_dev { > uint32_t xaq_buf_size; > uint32_t xae_waes; > uint32_t iue; > - uint64_t xaq_aura; > - void *xaq_mem; > + struct roc_sso_xaq_data xaq; > roc_nix_inl_sso_work_cb_t work_cb; > void *cb_args; > > -- > 2.17.1 >