* [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support
@ 2021-05-24 13:06 pbhagavatula
2021-05-24 13:06 ` [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath pbhagavatula
2021-06-13 13:18 ` [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support Jerin Jacob
0 siblings, 2 replies; 4+ messages in thread
From: pbhagavatula @ 2021-05-24 13:06 UTC (permalink / raw)
To: jerinj, Pavan Nikhilesh, Shijith Thotton; +Cc: dev
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add event vector support for cnxk event Rx adapter, add control path
APIs to get vector limits and ability to configure event vectorization
on a given Rx queue.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/cnxk/cn10k_eventdev.c | 106 ++++++++++++++++++++++-
drivers/event/cnxk/cnxk_eventdev.h | 2 +
drivers/event/cnxk/cnxk_eventdev_adptr.c | 25 ++++++
3 files changed, 132 insertions(+), 1 deletion(-)
diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 817cb08480..c9e4ddf1bb 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -595,7 +595,8 @@ cn10k_sso_rx_adapter_caps_get(const struct rte_eventdev *event_dev,
else
*caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT |
RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ |
- RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID;
+ RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID |
+ RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR;
return 0;
}
@@ -652,6 +653,105 @@ cn10k_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
return cnxk_sso_rx_adapter_queue_del(event_dev, eth_dev, rx_queue_id);
}
+static int
+cn10k_sso_rx_adapter_vector_limits(
+ const struct rte_eventdev *dev, const struct rte_eth_dev *eth_dev,
+ struct rte_event_eth_rx_adapter_vector_limits *limits)
+{
+ struct cnxk_eth_dev *cnxk_eth_dev;
+ int ret;
+
+ RTE_SET_USED(dev);
+ ret = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
+ if (ret)
+ return -ENOTSUP;
+
+ cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
+ limits->log2_sz = true;
+ limits->min_sz = 1 << ROC_NIX_VWQE_MIN_SIZE_LOG2;
+ limits->max_sz = 1 << ROC_NIX_VWQE_MAX_SIZE_LOG2;
+ limits->min_timeout_ns =
+ (roc_nix_get_vwqe_interval(&cnxk_eth_dev->nix) + 1) * 100;
+ limits->max_timeout_ns = BITMASK_ULL(8, 0) * limits->min_timeout_ns;
+
+ return 0;
+}
+
+static int
+cnxk_sso_rx_adapter_vwqe_enable(struct cnxk_eth_dev *cnxk_eth_dev,
+ uint16_t port_id, uint16_t rq_id, uint16_t sz,
+ uint64_t tmo_ns, struct rte_mempool *vmp)
+{
+ struct roc_nix_rq *rq;
+
+ rq = &cnxk_eth_dev->rqs[rq_id];
+
+ if (!rq->sso_ena)
+ return -EINVAL;
+ if (rq->flow_tag_width == 0)
+ return -EINVAL;
+
+ rq->vwqe_ena = 1;
+ rq->vwqe_first_skip = 0;
+ rq->vwqe_aura_handle = roc_npa_aura_handle_to_aura(vmp->pool_id);
+ rq->vwqe_max_sz_exp = rte_log2_u32(sz);
+ rq->vwqe_wait_tmo =
+ tmo_ns /
+ ((roc_nix_get_vwqe_interval(&cnxk_eth_dev->nix) + 1) * 100);
+ rq->tag_mask = (port_id & 0xF) << 20;
+ rq->tag_mask |=
+ (((port_id >> 4) & 0xF) | (RTE_EVENT_TYPE_ETHDEV_VECTOR << 4))
+ << 24;
+
+ return roc_nix_rq_modify(&cnxk_eth_dev->nix, rq, 0);
+}
+
+static int
+cn10k_sso_rx_adapter_vector_config(
+ const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
+ int32_t rx_queue_id,
+ const struct rte_event_eth_rx_adapter_event_vector_config *config)
+{
+ struct cnxk_eth_dev *cnxk_eth_dev;
+ struct cnxk_sso_evdev *dev;
+ int i, rc;
+
+ rc = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
+ if (rc)
+ return -EINVAL;
+
+ dev = cnxk_sso_pmd_priv(event_dev);
+ cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
+ if (rx_queue_id < 0) {
+ for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+ cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
+ RTE_EVENT_TYPE_ETHDEV_VECTOR);
+ rc = cnxk_sso_xae_reconfigure(
+ (struct rte_eventdev *)(uintptr_t)event_dev);
+ rc = cnxk_sso_rx_adapter_vwqe_enable(
+ cnxk_eth_dev, eth_dev->data->port_id, i,
+ config->vector_sz, config->vector_timeout_ns,
+ config->vector_mp);
+ if (rc)
+ return -EINVAL;
+ }
+ } else {
+
+ cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
+ RTE_EVENT_TYPE_ETHDEV_VECTOR);
+ rc = cnxk_sso_xae_reconfigure(
+ (struct rte_eventdev *)(uintptr_t)event_dev);
+ rc = cnxk_sso_rx_adapter_vwqe_enable(
+ cnxk_eth_dev, eth_dev->data->port_id, rx_queue_id,
+ config->vector_sz, config->vector_timeout_ns,
+ config->vector_mp);
+ if (rc)
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int
cn10k_sso_tx_adapter_caps_get(const struct rte_eventdev *dev,
const struct rte_eth_dev *eth_dev, uint32_t *caps)
@@ -720,6 +820,10 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = {
.eth_rx_adapter_start = cnxk_sso_rx_adapter_start,
.eth_rx_adapter_stop = cnxk_sso_rx_adapter_stop,
+ .eth_rx_adapter_vector_limits_get = cn10k_sso_rx_adapter_vector_limits,
+ .eth_rx_adapter_event_vector_config =
+ cn10k_sso_rx_adapter_vector_config,
+
.eth_tx_adapter_caps_get = cn10k_sso_tx_adapter_caps_get,
.eth_tx_adapter_queue_add = cn10k_sso_tx_adapter_queue_add,
.eth_tx_adapter_queue_del = cn10k_sso_tx_adapter_queue_del,
diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index 57c3327aa0..bca5d27912 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -94,6 +94,8 @@ struct cnxk_sso_evdev {
uint16_t tim_adptr_ring_cnt;
uint16_t *timer_adptr_rings;
uint64_t *timer_adptr_sz;
+ uint16_t vec_pool_cnt;
+ uint64_t *vec_pools;
/* Dev args */
uint32_t xae_cnt;
uint8_t qos_queue_cnt;
diff --git a/drivers/event/cnxk/cnxk_eventdev_adptr.c b/drivers/event/cnxk/cnxk_eventdev_adptr.c
index d4d07c793f..95483cb6ee 100644
--- a/drivers/event/cnxk/cnxk_eventdev_adptr.c
+++ b/drivers/event/cnxk/cnxk_eventdev_adptr.c
@@ -40,6 +40,31 @@ cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
dev->adptr_xae_cnt += rxq->qconf.mp->size;
break;
}
+ case RTE_EVENT_TYPE_ETHDEV_VECTOR: {
+ struct rte_mempool *mp = data;
+ uint64_t *old_ptr;
+
+ for (i = 0; i < dev->vec_pool_cnt; i++) {
+ if ((uint64_t)mp == dev->vec_pools[i])
+ return;
+ }
+
+ dev->vec_pool_cnt++;
+ old_ptr = dev->vec_pools;
+ dev->vec_pools =
+ rte_realloc(dev->vec_pools,
+ sizeof(uint64_t) * dev->vec_pool_cnt, 0);
+ if (dev->vec_pools == NULL) {
+ dev->adptr_xae_cnt += mp->size;
+ dev->vec_pools = old_ptr;
+ dev->vec_pool_cnt--;
+ return;
+ }
+ dev->vec_pools[dev->vec_pool_cnt - 1] = (uint64_t)mp;
+
+ dev->adptr_xae_cnt += mp->size;
+ break;
+ }
case RTE_EVENT_TYPE_TIMER: {
struct cnxk_tim_ring *timr = data;
uint16_t *old_ring_ptr;
--
2.17.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath
2021-05-24 13:06 [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support pbhagavatula
@ 2021-05-24 13:06 ` pbhagavatula
2021-06-13 13:14 ` Jerin Jacob
2021-06-13 13:18 ` [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support Jerin Jacob
1 sibling, 1 reply; 4+ messages in thread
From: pbhagavatula @ 2021-05-24 13:06 UTC (permalink / raw)
To: jerinj, Pavan Nikhilesh, Shijith Thotton; +Cc: dev
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add Rx event vector fastpath to convert HW defined metadata into
rte_mbuf and rte_event_vector.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/cnxk/cn10k_worker.h | 50 +++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h
index b3f71202ad..8c2cd72873 100644
--- a/drivers/event/cnxk/cn10k_worker.h
+++ b/drivers/event/cnxk/cn10k_worker.h
@@ -5,6 +5,8 @@
#ifndef __CN10K_WORKER_H__
#define __CN10K_WORKER_H__
+#include <rte_vect.h>
+
#include "cnxk_ethdev.h"
#include "cnxk_eventdev.h"
#include "cnxk_worker.h"
@@ -101,6 +103,44 @@ cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, uint8_t port_id,
mbuf_init.value, flags);
}
+static __rte_always_inline void
+cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags,
+ void *lookup_mem)
+{
+ union mbuf_initializer mbuf_init = {
+ .fields = {.data_off = RTE_PKTMBUF_HEADROOM,
+ .refcnt = 1,
+ .nb_segs = 1,
+ .port = port_id},
+ };
+ struct rte_event_vector *vec;
+ uint16_t nb_mbufs, non_vec;
+ uint64_t **wqe;
+
+ vec = (struct rte_event_vector *)vwqe;
+ wqe = vec->u64s;
+
+ nb_mbufs = RTE_ALIGN_FLOOR(vec->nb_elem, NIX_DESCS_PER_LOOP);
+ nb_mbufs = cn10k_nix_recv_pkts_vector(&mbuf_init.value, vec->mbufs,
+ nb_mbufs, flags | NIX_RX_VWQE_F,
+ lookup_mem);
+ wqe += nb_mbufs;
+ non_vec = vec->nb_elem - nb_mbufs;
+
+ while (non_vec) {
+ struct nix_cqe_hdr_s *cqe = (struct nix_cqe_hdr_s *)wqe[0];
+ struct rte_mbuf *mbuf;
+
+ mbuf = (struct rte_mbuf *)((char *)cqe -
+ sizeof(struct rte_mbuf));
+ cn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem,
+ mbuf_init.value, flags);
+ wqe[0] = (uint64_t *)mbuf;
+ non_vec--;
+ wqe++;
+ }
+}
+
static __rte_always_inline uint16_t
cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
const uint32_t flags, void *lookup_mem)
@@ -141,6 +181,16 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
gw.u64[0] & 0xFFFFF, flags,
lookup_mem);
gw.u64[1] = mbuf;
+ } else if (CNXK_EVENT_TYPE_FROM_TAG(gw.u64[0]) ==
+ RTE_EVENT_TYPE_ETHDEV_VECTOR) {
+ uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]);
+ __uint128_t vwqe_hdr = *(__uint128_t *)gw.u64[1];
+
+ vwqe_hdr = ((vwqe_hdr >> 64) & 0xFFF) | BIT_ULL(31) |
+ ((vwqe_hdr & 0xFFFF) << 48) |
+ ((uint64_t)port << 32);
+ *(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr;
+ cn10k_process_vwqe(gw.u64[1], port, flags, lookup_mem);
}
}
--
2.17.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath
2021-05-24 13:06 ` [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath pbhagavatula
@ 2021-06-13 13:14 ` Jerin Jacob
0 siblings, 0 replies; 4+ messages in thread
From: Jerin Jacob @ 2021-06-13 13:14 UTC (permalink / raw)
To: Pavan Nikhilesh; +Cc: Jerin Jacob, Shijith Thotton, dpdk-dev
On Mon, May 24, 2021 at 6:36 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add Rx event vector fastpath to convert HW defined metadata into
> rte_mbuf and rte_event_vector.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
> drivers/event/cnxk/cn10k_worker.h | 50 +++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h
> index b3f71202ad..8c2cd72873 100644
> --- a/drivers/event/cnxk/cn10k_worker.h
> +++ b/drivers/event/cnxk/cn10k_worker.h
> @@ -5,6 +5,8 @@
> #ifndef __CN10K_WORKER_H__
> #define __CN10K_WORKER_H__
>
> +#include <rte_vect.h>
> +
> #include "cnxk_ethdev.h"
> #include "cnxk_eventdev.h"
> #include "cnxk_worker.h"
> @@ -101,6 +103,44 @@ cn10k_wqe_to_mbuf(uint64_t wqe, const uint64_t mbuf, uint8_t port_id,
> mbuf_init.value, flags);
> }
>
> +static __rte_always_inline void
> +cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags,
> + void *lookup_mem)
> +{
> + union mbuf_initializer mbuf_init = {
> + .fields = {.data_off = RTE_PKTMBUF_HEADROOM,
> + .refcnt = 1,
> + .nb_segs = 1,
> + .port = port_id},
> + };
If there is performance improvement move mbuf_init population to slow
path and store it
in HWS software structure or so.
> + struct rte_event_vector *vec;
> + uint16_t nb_mbufs, non_vec;
> + uint64_t **wqe;
> +
> + vec = (struct rte_event_vector *)vwqe;
> + wqe = vec->u64s;
> +
> + nb_mbufs = RTE_ALIGN_FLOOR(vec->nb_elem, NIX_DESCS_PER_LOOP);
> + nb_mbufs = cn10k_nix_recv_pkts_vector(&mbuf_init.value, vec->mbufs,
> + nb_mbufs, flags | NIX_RX_VWQE_F,
> + lookup_mem);
> + wqe += nb_mbufs;
> + non_vec = vec->nb_elem - nb_mbufs;
> +
> + while (non_vec) {
> + struct nix_cqe_hdr_s *cqe = (struct nix_cqe_hdr_s *)wqe[0];
> + struct rte_mbuf *mbuf;
> +
> + mbuf = (struct rte_mbuf *)((char *)cqe -
> + sizeof(struct rte_mbuf));
> + cn10k_nix_cqe_to_mbuf(cqe, cqe->tag, mbuf, lookup_mem,
> + mbuf_init.value, flags);
> + wqe[0] = (uint64_t *)mbuf;
> + non_vec--;
> + wqe++;
> + }
> +}
> +
> static __rte_always_inline uint16_t
> cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
> const uint32_t flags, void *lookup_mem)
> @@ -141,6 +181,16 @@ cn10k_sso_hws_get_work(struct cn10k_sso_hws *ws, struct rte_event *ev,
> gw.u64[0] & 0xFFFFF, flags,
> lookup_mem);
> gw.u64[1] = mbuf;
> + } else if (CNXK_EVENT_TYPE_FROM_TAG(gw.u64[0]) ==
> + RTE_EVENT_TYPE_ETHDEV_VECTOR) {
> + uint8_t port = CNXK_SUB_EVENT_FROM_TAG(gw.u64[0]);
> + __uint128_t vwqe_hdr = *(__uint128_t *)gw.u64[1];
> +
> + vwqe_hdr = ((vwqe_hdr >> 64) & 0xFFF) | BIT_ULL(31) |
> + ((vwqe_hdr & 0xFFFF) << 48) |
> + ((uint64_t)port << 32);
> + *(uint64_t *)gw.u64[1] = (uint64_t)vwqe_hdr;
> + cn10k_process_vwqe(gw.u64[1], port, flags, lookup_mem);
> }
> }
>
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support
2021-05-24 13:06 [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support pbhagavatula
2021-05-24 13:06 ` [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath pbhagavatula
@ 2021-06-13 13:18 ` Jerin Jacob
1 sibling, 0 replies; 4+ messages in thread
From: Jerin Jacob @ 2021-06-13 13:18 UTC (permalink / raw)
To: Pavan Nikhilesh; +Cc: Jerin Jacob, Shijith Thotton, dpdk-dev
On Mon, May 24, 2021 at 6:36 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add event vector support for cnxk event Rx adapter, add control path
> APIs to get vector limits and ability to configure event vectorization
> on a given Rx queue.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> +
> +static int
> +cn10k_sso_rx_adapter_vector_config(
> + const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
> + int32_t rx_queue_id,
> + const struct rte_event_eth_rx_adapter_event_vector_config *config)
> +{
> + struct cnxk_eth_dev *cnxk_eth_dev;
> + struct cnxk_sso_evdev *dev;
> + int i, rc;
> +
> + rc = strncmp(eth_dev->device->driver->name, "net_cn10k", 8);
> + if (rc)
> + return -EINVAL;
> +
> + dev = cnxk_sso_pmd_priv(event_dev);
> + cnxk_eth_dev = cnxk_eth_pmd_priv(eth_dev);
> + if (rx_queue_id < 0) {
> + for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
> + cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
> + RTE_EVENT_TYPE_ETHDEV_VECTOR);
> + rc = cnxk_sso_xae_reconfigure(
> + (struct rte_eventdev *)(uintptr_t)event_dev);
> + rc = cnxk_sso_rx_adapter_vwqe_enable(
> + cnxk_eth_dev, eth_dev->data->port_id, i,
> + config->vector_sz, config->vector_timeout_ns,
> + config->vector_mp);
> + if (rc)
> + return -EINVAL;
> + }
See below
> + } else {
> +
> + cnxk_sso_updt_xae_cnt(dev, config->vector_mp,
> + RTE_EVENT_TYPE_ETHDEV_VECTOR);
> + rc = cnxk_sso_xae_reconfigure(
> + (struct rte_eventdev *)(uintptr_t)event_dev);
> + rc = cnxk_sso_rx_adapter_vwqe_enable(
> + cnxk_eth_dev, eth_dev->data->port_id, rx_queue_id,
> + config->vector_sz, config->vector_timeout_ns,
> + config->vector_mp);
> + if (rc)
> + return -EINVAL;
> + }
Parameterize and move this separate function to avoid code duplication.
> +
> + return 0;
> +}
> +
# Add update this feature in doc/guides/eventdevs/cnxk.rst.
# Please add a new section in the release not for the enhancement of
event cnxk driver and add new feature there
as you update the feature in code.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-06-13 13:18 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-05-24 13:06 ` [dpdk-dev] [PATCH 2/2] event/cnxk: add Rx event vector fastpath pbhagavatula
2021-06-13 13:14 ` Jerin Jacob
2021-06-13 13:18 ` [dpdk-dev] [PATCH 1/2] event/cnxk: add Rx adapter vector support Jerin Jacob
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