From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EC671A0093; Thu, 13 Jan 2022 11:19:22 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6365D410E1; Thu, 13 Jan 2022 11:19:22 +0100 (CET) Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) by mails.dpdk.org (Postfix) with ESMTP id 6BC1940150 for ; Thu, 13 Jan 2022 11:19:21 +0100 (CET) Received: by mail-io1-f50.google.com with SMTP id w9so7656927iol.13 for ; Thu, 13 Jan 2022 02:19:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yJZEN9YX/l5/DVthZOboJc/tGHrf3qEWmoN2VHavDlI=; b=GvlUNLucLNxl12IB3nfLz9SLrg3bSjw+GRrJYIBW4uNvL5uOc90Og70+l6T877o+Q0 s9Ein5R5Qumku09zqaGZBMjuSuvc4Ui4nEmL7qqfe5q3nupnAaNyzXqffPJVPEdp3460 XS6tG3p6XWGczarrtZfaiTdD8tAFXjp8/R406vmf/ul4gRywq/SN7pq6aE7m9h/G7rMG jHIWsDvAlljt9/Nq9ggiZIEDvmmQwNlwyGv2WveXH1iCdbTaQ6EQnKffTfS6T6r5ixrl cwx9nzDg0Pi2CjWgFYbuvDHeO04oUPKH6QuR4NSByac4eKbh7Id5SRzWicTfOOcU0mIK TixA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yJZEN9YX/l5/DVthZOboJc/tGHrf3qEWmoN2VHavDlI=; b=GM3oJHgv9/HyT4nBFho3J7FhZMG13XKNa7v5i7IBipTDwnhYjIiPMKJNXg36fubLvL VDu0Rb8o6jTQ0OsL9z6ll7WzZ2ltPp/udrSfGz4yR20B9zFA5MiGeBIE+y5oyMNmjFpW VMC/aizh6Hc1k6u9/Z8FvNOJfAzH55pJxD1kUYkk5pdg2kfqXXUpTjj+K5qEUOceO7qR SnoOQd7IDDqmCpze8Mr84EFtU5uf7Hvlc96Vs/KMz7ldFqN2dqfKF7q5aNuC3rTQdMYY sShv5G3HO1/sYG+/DGtt8B3tX1FfdzvQLDoZX/xW38XryGoH6xQH4HNyoGTCMSghQ0bw 0GsA== X-Gm-Message-State: AOAM530xqFdO6jT2AVJ0cHHiVVJVQUD3SdE0/65cZACFt4fa31eAk9gs UrhaotmGmGyrjF5XgXFezbAS9vsbY8RKeL3+E3g= X-Google-Smtp-Source: ABdhPJzFhsloNeffWBcDkfqq9S6xjXT2mbEtxab+SuEyDQ01FrSlnoEY8JUaYbl51PD9DhNnEEQ9+/5QvnWubgMclAI= X-Received: by 2002:a02:5dc5:: with SMTP id w188mr457980jaa.158.1642069160732; Thu, 13 Jan 2022 02:19:20 -0800 (PST) MIME-Version: 1.0 References: <20211224225923.806498-1-dharmik.thakkar@arm.com> <20220113053630.886638-1-dharmik.thakkar@arm.com> <20220113053630.886638-2-dharmik.thakkar@arm.com> In-Reply-To: <20220113053630.886638-2-dharmik.thakkar@arm.com> From: Jerin Jacob Date: Thu, 13 Jan 2022 15:48:54 +0530 Message-ID: Subject: Re: [PATCH v2 1/1] mempool: implement index-based per core cache To: Dharmik Thakkar Cc: Olivier Matz , Andrew Rybchenko , dpdk-dev , nd , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Jan 13, 2022 at 11:06 AM Dharmik Thakkar wrote: > > Current mempool per core cache implementation stores pointers to mbufs > On 64b architectures, each pointer consumes 8B > This patch replaces it with index-based implementation, > where in each buffer is addressed by (pool base address + index) > It reduces the amount of memory/cache required for per core cache > > L3Fwd performance testing reveals minor improvements in the cache > performance (L1 and L2 misses reduced by 0.60%) > with no change in throughput > > Suggested-by: Honnappa Nagarahalli > Signed-off-by: Dharmik Thakkar > Reviewed-by: Ruifeng Wang > --- > > /* Now fill in the response ... */ > +#ifdef RTE_MEMPOOL_INDEX_BASED_LCORE_CACHE Instead of having this #ifdef clutter everywhere for the pair, I think, we can define RTE_MEMPOOL_INDEX_BASED_LCORE_CACHE once, and have a different implementation. i.e #ifdef RTE_MEMPOOL_INDEX_BASED_LCORE_CACHE void x() { } void y() { } #else void x() { } void y() { } #endif call x(); y(); in the main code. > diff --git a/lib/mempool/rte_mempool_ops_default.c b/lib/mempool/rte_mempool_ops_default.c > index 22fccf9d7619..3543cad9d4ce 100644 > --- a/lib/mempool/rte_mempool_ops_default.c > +++ b/lib/mempool/rte_mempool_ops_default.c > @@ -127,6 +127,13 @@ rte_mempool_op_populate_helper(struct rte_mempool *mp, unsigned int flags, > obj = va + off; > obj_cb(mp, obj_cb_arg, obj, > (iova == RTE_BAD_IOVA) ? RTE_BAD_IOVA : (iova + off)); > +#ifdef RTE_MEMPOOL_INDEX_BASED_LCORE_CACHE This is the only place used in C code. Since we are going compile time approach. Can make this unconditional? That will enable the use of this model in the application, without recompiling DPDK. All application needs to #define RTE_MEMPOOL_INDEX_BASED_LCORE_CACHE 1 #include I believe enabling such structuring helps to avoid DPDK recompilation of code. > + /* Store pool base value to calculate indices for index-based > + * lcore cache implementation > + */ > + if (i == 0) > + mp->pool_base_value = obj; > +#endif > rte_mempool_ops_enqueue_bulk(mp, &obj, 1); > off += mp->elt_size + mp->trailer_size; > } > -- > 2.17.1 >