From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E7F47A0547; Fri, 29 Oct 2021 16:54:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B289041C3B; Fri, 29 Oct 2021 16:54:48 +0200 (CEST) Received: from mail-il1-f173.google.com (mail-il1-f173.google.com [209.85.166.173]) by mails.dpdk.org (Postfix) with ESMTP id 739DA4111F for ; Fri, 29 Oct 2021 16:54:47 +0200 (CEST) Received: by mail-il1-f173.google.com with SMTP id y17so10882857ilb.9 for ; Fri, 29 Oct 2021 07:54:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=N44r2kIarV7oMt7bl8Pc6cDbBX7Sp2ESUBqissCCTCw=; b=PDjcAGOuZ66ZM5RVLfT1qhaluSQpbWS9Cfe7uq838eGwNG+Ut5qn7uyaXHNyd0iweS 4AObW33plwBehsms/Mki4lSz1dENL6q6vo1WywLXQe0+2bItjq2q2VhPgVXf2PkJLdyb v1uUfQlmWkcsRkkSSMhGu9veho8KMxsCxiiL6eHv56w5UjQzYh/2JM9qDh2XoKZRD0l+ d2MtuGKMwVTWlx+pZYfUYV+VBdvI7pwauB+zAc3sXCcfZ+SH785o8VcUhIJrnZRPy37k DsMy1TYDt2MMycqWEmdy3gdM1VSx/52H2I0lDkequKcJpq21UrLtJnusGERNPAY8TA9R CPnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=N44r2kIarV7oMt7bl8Pc6cDbBX7Sp2ESUBqissCCTCw=; b=gRbJPUGigSnByLrTLbYIMGtNvkLW+zlqLVdTqBiv2s6z8CaGxiWcStTzUQUZUs+Szn TqujDNV7U2odU3agJO5f5kqiosPfRb8PyIgJiFg5e74tUeER50+dQ3s7wbWQsC2aJImn xKsIh7kEIUg0JagU4d/Uv/DYSaTx2PQmQk+Kwaa0zmkQsfBaD0cYeMZezM0Mdnkdc2gX b766tq3HM8goxpXoC/uE1cY/NsfgkrKv2hT5cWjrYOcrEC6dMclTDRXF2BGZ7EkAxrhX awkkrlHTjwoYtpSaULcQuk3EFHX0NGNacpOk+KE6AltxAppmimyl5JOPsZEnPfZeZN+V iYQw== X-Gm-Message-State: AOAM531l3eLQNRZIF7huVuDR8nCeBWZz0W0qTywxdM1blK+M3vS1RHuf 2ZJfpGGbXG3qWjFvkAvVcjnuR2mFILTdtb23t9Q= X-Google-Smtp-Source: ABdhPJzSG5wReEIlUClkmEn2tCkfyLE73upYUR0kq3sxcDXEcUumXcpuO8qZg3PGjJ9UypweV2i0mxsP9ND8X++M1JY= X-Received: by 2002:a05:6e02:1a2d:: with SMTP id g13mr8344689ile.295.1635519286765; Fri, 29 Oct 2021 07:54:46 -0700 (PDT) MIME-Version: 1.0 References: <20211026041300.28924-1-radhac@marvell.com> <20211026041300.28924-3-radhac@marvell.com> In-Reply-To: From: Jerin Jacob Date: Fri, 29 Oct 2021 20:24:20 +0530 Message-ID: To: Radha Mohan Cc: Radha Mohan Chintakuntla , Thomas Monjalon , fengchengwen , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Jerin Jacob , Satananda Burla , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Oct 28, 2021 at 11:48 PM Radha Mohan wrote: > > On Tue, Oct 26, 2021 at 1:49 AM Jerin Jacob wrote: > > > > On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla > > wrote: > > > > > > Add functions for the dmadev vchan setup and DMA operations. > > > > > > Signed-off-by: Radha Mohan Chintakuntla > > > +static int > > > +cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, > > > + rte_iova_t dst, uint32_t length, uint64_t flags) > > > +{ > > > + uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; > > > + union dpi_instr_hdr_s *header = (union dpi_instr_hdr_s *)&cmd[0]; > > > + rte_iova_t fptr, lptr; > > > + struct cnxk_dpi_vf_s *dpivf = dev_private; > > > + struct cnxk_dpi_compl_s *comp_ptr; > > > + int num_words = 0; > > > + int rc; > > > + > > > + RTE_SET_USED(vchan); > > > + > > > + header->s.xtype = dpivf->conf.direction; > > > + header->s.pt = DPI_HDR_PT_ZBW_CA; > > > + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; > > > + comp_ptr->cdata = DPI_REQ_CDATA; > > > + header->s.ptr = (uint64_t)comp_ptr; > > > + STRM_INC(dpivf->conf.c_desc); > > > + > > > + /* pvfe should be set for inbound and outbound only */ > > > + if (header->s.xtype <= 1) > > > + header->s.pvfe = 1; > > > + num_words += 4; > > > + > > > + header->s.nfst = 1; > > > + header->s.nlst = 1; > > > > Including filling zeros in cmd and the rest of the filling can be > > moved to slow path.. > > > > Please change the logic to populate the static items based on > > configure/channel setup > > in slowpath and update only per transfer-specific items to have better > > performance. > > > These are instruction header values that we are filling. If you look > at it there is really one 64bit field that can be filled beforehand > a.k.a slowpath in vchan_setup(). > Rest of the header can only be filled here like nlst, nfst (these are > number of pointers to be DMA'ed) and completion pointer. So just for > that I do not see a value in moving around the code. Two things, 1) By dong like below, > > > + header->s.nfst = 1; > > > + header->s.nlst = 1; it will generate multiple stores. One option is to have a local u64 variable and form the required descriptor and write it one shot. It is a standard optimation strategy used in fastpath. 2) uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; This will result in memset of 64B, That reason for creating template based on vchan make sense. Looks like moving to a template-based scheme need a lot of rework in the driver, I will leave you to decide performance vs other aspects as you are maintaining the driver. No strong opinion. > >