From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7C435A052E; Mon, 9 Mar 2020 17:17:26 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CFC051C02E; Mon, 9 Mar 2020 17:17:25 +0100 (CET) Received: from mail-io1-f67.google.com (mail-io1-f67.google.com [209.85.166.67]) by dpdk.org (Postfix) with ESMTP id AD58AFEB for ; Mon, 9 Mar 2020 17:17:23 +0100 (CET) Received: by mail-io1-f67.google.com with SMTP id q128so9676679iof.9 for ; Mon, 09 Mar 2020 09:17:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kcY9xecVDIkEPLrcwG8FgS7cgJIKykTcNcwDDmFH/rs=; b=C8xO+vpz9mGG3eekHu5DLPKyR1hI+Y4LjevukFWYcoSyN6hWTPpBo+55iIYdMH/4VI ZmYVmUktYf9GvUGBFM0zyeF4KJRclgL3G8mk9QiHMYlL7PycgLxTCsEEfS8n/TJGdnWz y6xom76N207V6BrnfUAKce4KVtwjjMDmXxZqFVOoWwiwkrhfuLfNdTW55PZfUdHry6lW eYJRyLXwZo/X2DlwOoIsP7hicxwTN5CdsCGEZW/2goEgwEvmIZpFZutRrj1U4onYrrV7 Dy2WX95zKGOAsgFy/hILwgO+KhyeNP8GBikubR/61Wt/zxQpPnfj/n8ht9vX8tGhvdnC vGOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kcY9xecVDIkEPLrcwG8FgS7cgJIKykTcNcwDDmFH/rs=; b=nn5knYU/qXS6qwy8cAheim5ptW6OUjL/YDxqz1rVGe+fbjtQtU2SIjjZrd8BMPIzz5 JnQJpbvN5BlAU8L1sDHYzdwFQJ0iiIghKUp+ymCX6LG1cbtBnKnZHPmzps/4mUuSfReC ImY0RbI+RuGwWRLPUAi17k8edFET2PeX12nxRCw7ENIduqlIvXAgb3d8J48JRqMahLa3 TY3MtGgHu1p3ro/fwwK4455FKYVXmZXcghUtrd7cwVTvCXxk/O71/lXiwzvPQRujKgs4 BvI3d96DXoo6l5i1zi3CsAbkNIcz3Qufg1B7b/zFWyFFl0/za7LjpMi/TcWNajHHvfRV h0Cw== X-Gm-Message-State: ANhLgQ0jql7wMgzYMC+W/wRUdLXxrdqG4k8p4gAPq70/dhT9GdwQO4by v45iIZNmIDmMRoZN4kDqwEeYov7sTnxOQPTVFPs= X-Google-Smtp-Source: ADFU+vt9rqJQLa6/mwauy+3NRfTOs58FU7ZGEzfmKV1e9RSHSyzSGyUp4IHtmQNv8hu44V2y1V+jks3fBCp6e/soIEA= X-Received: by 2002:a02:c016:: with SMTP id y22mr16359203jai.104.1583770642783; Mon, 09 Mar 2020 09:17:22 -0700 (PDT) MIME-Version: 1.0 References: <20200309093844.30579-1-david.marchand@redhat.com> In-Reply-To: <20200309093844.30579-1-david.marchand@redhat.com> From: Jerin Jacob Date: Mon, 9 Mar 2020 21:47:05 +0530 Message-ID: To: David Marchand Cc: dpdk-dev , Jerin Jacob , Gavin Hu , Jan Viktorin Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH] eal/arm64: remove internal macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Mon, Mar 9, 2020 at 3:09 PM David Marchand wrote: > > No need to export dsb and dmb. > EAL memory barriers are the public API. > > %s/\<\(d.b\)\>(\([^()]*\))$/asm volatile("\1 \2" : : : "memory")/ > > Signed-off-by: David Marchand Acked-by: Jerin Jacob > --- > .../common/include/arch/arm/rte_atomic_64.h | 19 ++++++++----------- > 1 file changed, 8 insertions(+), 11 deletions(-) > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > index 859ae129d8..7b7099cdc1 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h > @@ -19,20 +19,17 @@ extern "C" { > #include > #include > > -#define dsb(opt) asm volatile("dsb " #opt : : : "memory") > -#define dmb(opt) asm volatile("dmb " #opt : : : "memory") > +#define rte_mb() asm volatile("dsb sy" : : : "memory") > > -#define rte_mb() dsb(sy) > +#define rte_wmb() asm volatile("dsb st" : : : "memory") > > -#define rte_wmb() dsb(st) > +#define rte_rmb() asm volatile("dsb ld" : : : "memory") > > -#define rte_rmb() dsb(ld) > +#define rte_smp_mb() asm volatile("dmb ish" : : : "memory") > > -#define rte_smp_mb() dmb(ish) > +#define rte_smp_wmb() asm volatile("dmb ishst" : : : "memory") > > -#define rte_smp_wmb() dmb(ishst) > - > -#define rte_smp_rmb() dmb(ishld) > +#define rte_smp_rmb() asm volatile("dmb ishld" : : : "memory") > > #define rte_io_mb() rte_mb() > > @@ -40,9 +37,9 @@ extern "C" { > > #define rte_io_rmb() rte_rmb() > > -#define rte_cio_wmb() dmb(oshst) > +#define rte_cio_wmb() asm volatile("dmb oshst" : : : "memory") > > -#define rte_cio_rmb() dmb(oshld) > +#define rte_cio_rmb() asm volatile("dmb oshld" : : : "memory") > > /*------------------------ 128 bit atomic operations -------------------------*/ > > -- > 2.23.0 >