From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E342F42C4C; Wed, 7 Jun 2023 10:20:40 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D28E140A84; Wed, 7 Jun 2023 10:20:40 +0200 (CEST) Received: from mail-vk1-f173.google.com (mail-vk1-f173.google.com [209.85.221.173]) by mails.dpdk.org (Postfix) with ESMTP id 064D140698 for ; Wed, 7 Jun 2023 10:20:40 +0200 (CEST) Received: by mail-vk1-f173.google.com with SMTP id 71dfb90a1353d-45d3e523a43so2734781e0c.2 for ; Wed, 07 Jun 2023 01:20:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686126039; x=1688718039; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=gV7CijsAM45C5JUMEivzkfEK6vGMIZFc7cBONlgKSfQ=; b=FdeqE47USHtNV2Eoxt8zmuAnH5k/xLgSGy8jxdDYXQNBRiXiBQcRYXkwcVzHTGJy+f uteM3qhFefx+AIi4foQn6xEL2i5VOqycaYjyG3C5W/1xTFf6A80OmjIqcw872rfse1Pv 2tlnftdS6VfD3C9OASCvb/f+I9yv++xlO1eKzQVw0xsYZfNIbO+mX3j182Pa+IvDFiqO NWAL9xJ42hBaPOUiiwnI7ryx0jdlALryEPcUtXSEilRKrBdd3wwlqKOYiOVCcEa5a8iT qMXj3FdbdDsACVrzY/nGdAcog4pP0e1RlVAz1pHOxgr9zefiBgswKirBfRD5BXjxUBnY x0+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686126039; x=1688718039; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gV7CijsAM45C5JUMEivzkfEK6vGMIZFc7cBONlgKSfQ=; b=gZ/BFZQ8i9GgD63BkyShEp3YMxnBRv6YRlTHnB1FeuTalkLHQF0iNe7VuU5UqxnJoE tqiC2cbdXVr+ysdF8ufv5lVR1T3bQ8duxgotvuYf44shgqCb5riwQ/1cVxVQg0dzE1oV XLgk1toEutIc+/kIeTw/wsdonkzqaaJWCT70ZWEYtAGU+6hR8WnC9KjZzxB/V8jUznQB V0xWS3dPjH9pMEaibu0W/ckfXoyxK58j3YbJKSMEv66vhv6zZgIJoyBn6XSbu0YwVVbS fePoto7r/Sbm+dScHQoZn9lEQpFlWWB17CUfjyZhS4rsx1Of7oVsZlxbJJI+EPgfYG1F ZzVQ== X-Gm-Message-State: AC+VfDwAXGbJb435gY8Y9mWpOBskWnYyu+aigV2u3ndv+Dc4NAfHPz/9 ohRFpMB9Skv2Jt69ad5G78A7k8cF6f16aMfTj+k= X-Google-Smtp-Source: ACHHUZ6DuFpPsmZ0aX4smvo21vlr/7MnYEcXF+m05iIaU9uuulK8zP3Cv1rZHQCC7577rBeScJtvueVw/3RdjJNgLyc= X-Received: by 2002:a1f:dac1:0:b0:457:d0f:37bf with SMTP id r184-20020a1fdac1000000b004570d0f37bfmr1874618vkg.16.1686126039309; Wed, 07 Jun 2023 01:20:39 -0700 (PDT) MIME-Version: 1.0 References: <20230606144746.708388-1-zhirun.yan@intel.com> <20230607035144.1214492-1-zhirun.yan@intel.com> <20230607035144.1214492-15-zhirun.yan@intel.com> In-Reply-To: <20230607035144.1214492-15-zhirun.yan@intel.com> From: Jerin Jacob Date: Wed, 7 Jun 2023 13:50:13 +0530 Message-ID: Subject: Re: [PATCH v9 14/17] graph: add stats for cross-core dispatching To: Zhirun Yan Cc: dev@dpdk.org, jerinj@marvell.com, kirankumark@marvell.com, ndabilpuram@marvell.com, stephen@networkplumber.org, pbhagavatula@marvell.com, cunming.liang@intel.com, haiyue.wang@intel.com, mattias.ronnblom@ericsson.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, Jun 7, 2023 at 9:30=E2=80=AFAM Zhirun Yan wr= ote: > > Add stats for cross-core dispatching scheduler if stats collection is Use mcore dispatch model.(subject as well). be consistent in name usage. > diff --git a/lib/graph/rte_graph_worker_common.h b/lib/graph/rte_graph_wo= rker_common.h > index 9088d4c173..3fd3f7622f 100644 > --- a/lib/graph/rte_graph_worker_common.h > +++ b/lib/graph/rte_graph_worker_common.h > @@ -110,6 +110,8 @@ struct rte_node { > unsigned int lcore_id; /**< Node running lcore. = */ > } dispatch; > }; > + uint64_t total_sched_objs; /**< Number of objects scheduled. */ > + uint64_t total_sched_fail; /**< Number of scheduled failure. */ Move under dispatch_stats union. With above change: Acked-by: Jerin Jacob > /* Fast path area */ > #define RTE_NODE_CTX_SZ 16 > uint8_t ctx[RTE_NODE_CTX_SZ] __rte_cache_aligned; /**< Node Conte= xt. */ > -- > 2.37.2 >