From: Jerin Jacob <jerinjacobk@gmail.com>
To: Harman Kalra <hkalra@marvell.com>
Cc: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
dev@dpdk.org
Subject: Re: [PATCH 5/5] common/cnxk: enable PF VF mbox
Date: Fri, 20 Sep 2024 09:35:15 +0530 [thread overview]
Message-ID: <CALBAE1PnOX=F7G6Lc0har9HSsgunD-R6gBziNUacDOSF3QtP_A@mail.gmail.com> (raw)
In-Reply-To: <20240902062940.182273-6-hkalra@marvell.com>
On Mon, Sep 2, 2024 at 12:08 PM Harman Kalra <hkalra@marvell.com> wrote:
>
> * Setting up the mailbox communication between PF and VF for cn20k
> * Update PFVF mbox CSRs offset change introduced in cn20k
> * Memory to be allocated by PF driver for PF VF mbox should be
> aligned to next power of 2.
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
Series applied to dpdk-next-net-mrvl/for-main. Thanks
prev parent reply other threads:[~2024-09-20 4:05 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-02 6:29 [PATCH 0/5] Marvell cn20K SOC base code Harman Kalra
2024-09-02 6:29 ` [PATCH 1/5] common/cnxk: define platform configuration Harman Kalra
2024-09-02 6:29 ` [PATCH 2/5] common/cnxk: add CN20ka A0 model Harman Kalra
2024-09-02 6:29 ` [PATCH 3/5] common/cnxk: add cn20ka mbox support Harman Kalra
2024-09-02 6:29 ` [PATCH 4/5] common/cnxk: define PF VF bit encoding in pcifunc Harman Kalra
2024-09-02 6:29 ` [PATCH 5/5] common/cnxk: enable PF VF mbox Harman Kalra
2024-09-20 4:05 ` Jerin Jacob [this message]
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