From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9ED49A0545; Wed, 21 Dec 2022 05:44:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5AED040698; Wed, 21 Dec 2022 05:44:54 +0100 (CET) Received: from mail-vs1-f49.google.com (mail-vs1-f49.google.com [209.85.217.49]) by mails.dpdk.org (Postfix) with ESMTP id 71E7040684 for ; Wed, 21 Dec 2022 05:44:52 +0100 (CET) Received: by mail-vs1-f49.google.com with SMTP id i2so13729835vsc.1 for ; Tue, 20 Dec 2022 20:44:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=xJsvJnoBgt/x5ZoWUr9F7AFZeTgEMi5JTpm4jkRmuMc=; b=PEp5lgaY3Ct7sQtt7mR94YWsGruuGgYTU+j1sNCVX92Kj/+jiti4+9Ave2HjRQWVsn MQkIryAr9lUrHWAt1tLQ0C76pLQDtxIB6iCQmxT8oNarmNtliRR7KAj95T6dJ4LvcajC m5cQlqIMkMAogVej3UXMU5Acqkz+fALDPikPKW1YGK211oc/5EVjKk40MiYZYsVSon+0 +iHJBrDicoBwKL1zy/mxKRMoNb6yB3wBgdUrLwoBpgMXnkGZ2sLYU87V7Ej25EBNHFzk ccqHFJFpAAaVz77DOQi/L/DBYuYl+kkUz2iZc3OVIrraJKOYkcsRrenk5RRCIcXoxlQn 3Mpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xJsvJnoBgt/x5ZoWUr9F7AFZeTgEMi5JTpm4jkRmuMc=; b=7EjBLfseANgGE/EB2L7N2Oip/QaTtNfgYlnoqSkv0xJxX0/AXXNM5d65Prr2qDgwb/ iQ5ENB4qWtTS5k4Ti1xjlIB2U2QF9tNhWieUwACUahy6GBoXEqUv5Dxo4rD4592bb4AS kMCjmi0bqkbqa2mKdtHUzW8V2DEYAga2O/eAwiTve+vPfTQoldU4XeUmSRupQ20a+ZUu czqnjf6x67z4diY0ohjjLws3M7+GU1lba3nYkzpJk84XIeD+Fcq0cgE2CkJHbZ0TKdL+ 3F5+99s/wycV29Xc8ufR6Al8E2Tj7VmhTl3aHvvM8vREq5kKoSoCdRy5MoXgwWCSNsgV JHWA== X-Gm-Message-State: AFqh2kqXblNAAIS7VB2aXh9UfEzMwZQUZyCHnP8fJAzuSnVoQx7qrIP+ 4TbUoTKJY7RT9HrS8FfN1+369fdTL8MFgtRv6fM= X-Google-Smtp-Source: AMrXdXveaF27E2zP8DsDNguLSZP0Dg9PQiTALiAKO5k158GMhEKNivaYg6QmbUoig0NK707XZEUplBkwnL/FiUTUR6I= X-Received: by 2002:a67:fa10:0:b0:3b2:e77d:84a9 with SMTP id i16-20020a67fa10000000b003b2e77d84a9mr60876vsq.31.1671597891705; Tue, 20 Dec 2022 20:44:51 -0800 (PST) MIME-Version: 1.0 References: <20221208201806.21893-1-syalavarthi@marvell.com> <20221220192645.14042-1-syalavarthi@marvell.com> <20221220132357.26a8d75f@hermes.local> In-Reply-To: <20221220132357.26a8d75f@hermes.local> From: Jerin Jacob Date: Wed, 21 Dec 2022 10:14:25 +0530 Message-ID: Subject: Re: [PATCH v3 00/38] Implementation of ML CNXK driver To: Stephen Hemminger Cc: Srikanth Yalavarthi , dev@dpdk.org, sshankarnara@marvell.com, jerinj@marvell.com, aprabhu@marvell.com Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, Dec 21, 2022 at 2:54 AM Stephen Hemminger wrote: > > On Tue, 20 Dec 2022 11:26:07 -0800 > Srikanth Yalavarthi wrote: > > > Marvell ML CNXK Driver > > ---------------------- > > > > This patch series implements common Machine Learning (ML) ROC code > > and driver for Marvell Octeon 10 (cnxk) platform. ML inferencing is > > supported on cnxk platform through an integrated ML inferencing > > processor. The current driver supports programming the ML hardware > > engine through offload mode. > > > > All APIs proposed in the DPDK ML device specification are supported on > > the cnxk platform. > > > Is this hardware in the DPDK CI lab? No > How can the project make sure this isn't broken in future? It will be like the rest of 95% HWs of DPDK drivers. i.e. Vendor will make sure it is not broken.