From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CCEA2A034E; Thu, 6 Jan 2022 15:04:10 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4A03441152; Thu, 6 Jan 2022 15:04:10 +0100 (CET) Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) by mails.dpdk.org (Postfix) with ESMTP id 31B5B410F7 for ; Thu, 6 Jan 2022 15:04:09 +0100 (CET) Received: by mail-io1-f42.google.com with SMTP id o7so3133435ioo.9 for ; Thu, 06 Jan 2022 06:04:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ukSBAYvyOcFDC+sPZAl/29M9V/TA4t6+a3Rjysxnvho=; b=HLUVBolc18fG/K33EP0E4pqPSJ59BHfCc2k21LHASS11y+Z9wDUhSb3Z6hLYbFa/e9 5i24da6xiGmCUQwbrHIL5C7v/ldAI3GWo9AsrsnLy96C8QuJcGacVF5IGiIEa4ie2FaF m1Cdwpr/xLkWulHRS81x6OWTIVx6CMwOW8qYhpEx58ZHy7SI9vJm/7a/TcxUgLKl9ZEP 6VejVikJHSOBj7g4JJKImEdgtVTBVGdP+NUR2d6UAgpgTv93T/es81U5rAj0HaN83CwG mOP/NLaIUUwUAtYtATThHNQbLPb81poX/wq+dn8FbYguivUvvVdzQVL7P9tY50bwkYeQ rMfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ukSBAYvyOcFDC+sPZAl/29M9V/TA4t6+a3Rjysxnvho=; b=vTMQAVDrZvRVxrxybfxLrnNDmLwvvV93zti1Z5apHR4mOx8uDxPzCL8OhbJcus6Pq9 Gld0qp92zbOxQS9ZQQOESqRAIP42cILepPwnP5dwO0t2/ErMWRdBmV0CeRXgeQ1lhlNS 5PPU05inilVQ1oP9qxfswNJ3m6fs9BSyBd2jwE2Y0bzCWZsvxfzHt6DVOK9XXbysNj2Z qzVdyHqldh3kujFxc9kWd8pl7ExiuVMux3TrMi0Yoi4kgGxDu7ob4y+eCheUujCaGTWN MKcwZGmmtRcVqDlbNR7/VHVNAsBlDWxZYuK+xhSx61Y1xBAnDH39meKtLSva9vcoxXzp W+Iw== X-Gm-Message-State: AOAM532S1wJLURTLEbEZ0aSATv69Gmjkh9oHHLpQpwoJxirKaBl8w5D/ Qo5gi29S0nI8h/sPh3VNM4kNxq8FJOgKcAc/Z8s= X-Google-Smtp-Source: ABdhPJwVZlsqxo9ouJBEgEYSPnZBfSB+ZMH4j5mYHS6AvQd1PRLKSSp3NWqcdEHxjlvfJjX62MJRxV9vSX+s8zaQxMA= X-Received: by 2002:a05:6638:16c4:: with SMTP id g4mr28940477jat.266.1641477846958; Thu, 06 Jan 2022 06:04:06 -0800 (PST) MIME-Version: 1.0 References: <20211130054809.2697001-1-asekhar@marvell.com> In-Reply-To: <20211130054809.2697001-1-asekhar@marvell.com> From: Jerin Jacob Date: Thu, 6 Jan 2022 19:33:40 +0530 Message-ID: Subject: Re: [PATCH] common/cnxk: update cpu directive in NPA assembly code To: Ashwin Sekhar T K , Andrew Rybchenko , Ferruh Yigit Cc: dpdk-dev , Nithin Dabilpuram , Jerin Jacob , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Pavan Nikhilesh , Kiran Kumar K , Satheesh Paul , Anoob Joseph , Akhil Goyal Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, Nov 30, 2021 at 11:20 AM Ashwin Sekhar T K wrote: > > Update the CPU directive in ROC NPA assembly code snippets. > > Signed-off-by: Ashwin Sekhar T K Update the git commit as common/cnxk: update CPU directive in NPA assembly code Use arch_extension instead of .cpu directive in NPA assembly code snippets. Using .cpu directive with generic causes it to override the micro architecture selected by march,mcpu. For example if march=armv8.5-a+crypto+sve2 provided then the .cpu directive overrides it to generic+crypto+sve2, use arch_extension to get the expected result. Signed-off-by: Ashwin Sekhar T K Acked-by: Jerin Jacob Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_npa.h | 30 +++++++++++++----------------- > 1 file changed, 13 insertions(+), 17 deletions(-) > > diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h > index 46350fdb48..aeadc3d5e2 100644 > --- a/drivers/common/cnxk/roc_npa.h > +++ b/drivers/common/cnxk/roc_npa.h > @@ -433,7 +433,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num, > switch (num) { > case 30: > asm volatile( > - ".cpu generic+lse\n" > + ".arch_extension lse\n" > "mov v18.d[0], %[dst]\n" > "mov v18.d[1], %[loc]\n" > "mov v19.d[0], %[wdata]\n" > @@ -497,7 +497,7 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num, > break; > case 16: > asm volatile( > - ".cpu generic+lse\n" > + ".arch_extension lse\n" > "mov x16, %[wdata]\n" > "mov x17, %[wdata]\n" > "casp x0, x1, x16, x17, [%[loc]]\n" > @@ -517,15 +517,14 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num, > "stp x12, x13, [%[dst], #96]\n" > "stp x14, x15, [%[dst], #112]\n" > : > - : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr) > + : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr) > : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6", > "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", > - "x15", "x16", "x17" > - ); > + "x15", "x16", "x17"); > break; > case 8: > asm volatile( > - ".cpu generic+lse\n" > + ".arch_extension lse\n" > "mov x16, %[wdata]\n" > "mov x17, %[wdata]\n" > "casp x0, x1, x16, x17, [%[loc]]\n" > @@ -537,14 +536,13 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num, > "stp x4, x5, [%[dst], #32]\n" > "stp x6, x7, [%[dst], #48]\n" > : > - : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr) > + : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr) > : "memory", "x0", "x1", "x2", "x3", "x4", "x5", "x6", > - "x7", "x16", "x17" > - ); > + "x7", "x16", "x17"); > break; > case 4: > asm volatile( > - ".cpu generic+lse\n" > + ".arch_extension lse\n" > "mov x16, %[wdata]\n" > "mov x17, %[wdata]\n" > "casp x0, x1, x16, x17, [%[loc]]\n" > @@ -552,21 +550,19 @@ roc_npa_aura_bulk_alloc(uint64_t aura_handle, uint64_t *buf, unsigned int num, > "stp x0, x1, [%[dst]]\n" > "stp x2, x3, [%[dst], #16]\n" > : > - : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr) > - : "memory", "x0", "x1", "x2", "x3", "x16", "x17" > - ); > + : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr) > + : "memory", "x0", "x1", "x2", "x3", "x16", "x17"); > break; > case 2: > asm volatile( > - ".cpu generic+lse\n" > + ".arch_extension lse\n" > "mov x16, %[wdata]\n" > "mov x17, %[wdata]\n" > "casp x0, x1, x16, x17, [%[loc]]\n" > "stp x0, x1, [%[dst]]\n" > : > - : [wdata] "r" (wdata), [dst] "r" (buf), [loc] "r" (addr) > - : "memory", "x0", "x1", "x16", "x17" > - ); > + : [wdata] "r"(wdata), [dst] "r"(buf), [loc] "r"(addr) > + : "memory", "x0", "x1", "x16", "x17"); > break; > case 1: > buf[0] = roc_npa_aura_op_alloc(aura_handle, drop); > -- > 2.32.0 >