From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt0-f173.google.com (mail-qt0-f173.google.com [209.85.216.173]) by dpdk.org (Postfix) with ESMTP id 4D3722C38 for ; Wed, 22 Mar 2017 15:36:46 +0100 (CET) Received: by mail-qt0-f173.google.com with SMTP id x35so154058102qtc.2 for ; Wed, 22 Mar 2017 07:36:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atomicrules-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=qqKcyDFe7jvtHytLU8D69L4+JTJ/X5lx7IR4FChk9MM=; b=pcwW2szzR8F61croyKUXUG+vdS0S/dz5oUy394Umw/F0kAjPn6PVkRfACbOkmH6dYG E0wY6JG42loz5WlsUOEZAfHGA0KEebdnDDIyLK/N1M5v9ppzxXdlsNXT7rO0fesNT1W0 FEfnsYDuEp0RcNQV7SB0y+qg4tlSibkrIjfhyRVQY+rr14CocaGyL7a2/49Yn2C9X4ms XNEYMtcZBcpVxhbDAuEwrjbUcl0GH8vCzNLXHNxFrMdJusRISZousDPvRzwO/q75uQoT C0gGj70Xjjr+yssEAUzAaLxnsUbuxl6daXbeSwyA6BS2S60XHdOvnRG+hLi3PUFNxx7R mozg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=qqKcyDFe7jvtHytLU8D69L4+JTJ/X5lx7IR4FChk9MM=; b=M75QXHsbj9VomPVn/yZ18hthDHLcxaPkRpMU2ddDx+UZNm0IsbanXdDZs2E3sMvHCL nE5INvEr4+08vo802KDCdHbXjayGkZ5joJ+3zD1fJrS5/k6lLTDUb5pAFLtX54V4771o 5VW7Ip8ZYUJ9PlSsKsTR7PY0jOuxP+Vm2yAWH2C/0u4zRm68nrPO2k/dtQz6WTn81qOg vbdTrH1rkD9JrRzV4zhLSqiOQjyo2wOZamjnCzdOv1leGh4v4M08USJLuVBCM/mq45Xn v5ynaRMgD/2kKUFyOC4TFz/rZW8cgNSjCd/gCF630D6Bf+/rGHX8quE+cEeS5UMda/ev xONw== X-Gm-Message-State: AFeK/H1iod1iV/3Lsr86IaqnpPHYIuOamRfU+Up1jq0q4mFCM1f3fy+Ic3Le6FqS0T2QkCbST/uBv/f2WxJW3Q== X-Received: by 10.200.34.38 with SMTP id o35mr37358608qto.226.1490193405544; Wed, 22 Mar 2017 07:36:45 -0700 (PDT) MIME-Version: 1.0 Received: by 10.200.1.131 with HTTP; Wed, 22 Mar 2017 07:36:25 -0700 (PDT) In-Reply-To: <20170321173029.15af2a76@xeon-e3> References: <1490132621-7851-1-git-send-email-ed.czeck@atomicrules.com> <1490132621-7851-2-git-send-email-ed.czeck@atomicrules.com> <20170321151552.2d172477@xeon-e3> <20170321173029.15af2a76@xeon-e3> From: Ed Czeck Date: Wed, 22 Mar 2017 10:36:25 -0400 Message-ID: To: Stephen Hemminger Cc: dev@dpdk.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH v3 2/7] net/ark: HW API part 1 of 3 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 22 Mar 2017 14:36:46 -0000 Hi Stephen, The issue is not ordering or synchronizing IO read and write operations, so memory barriers are not the solution and will not address the compile optimizations which the volatile qualifier avoids. The linux kernel guide states: "The volatile storage class was originally meant for memory-mapped I/O registers." This is the usage in this case. The use of rte_read32() and other functions in that family are merely wrappers to casts to volatile. These functions and other wrappers are used throughout the drivers/net code. However, the use of these functions requires that every access point be manually decided and checked. By adding the volatile qualifier to the struct definition, there is no need to use these wrappers, since the struct definition is true to the physical hardware implementation. On Tue, Mar 21, 2017 at 8:30 PM, Stephen Hemminger < stephen@networkplumber.org> wrote: > On Tue, 21 Mar 2017 20:13:48 -0400 > Ed Czeck wrote: > > > Hi Stephen, > > > > Yes I understand the paranoid issue of volatile modifier, which is the > > reason it was coded in this manner. > > > > The struct with volatile are memory mapped IO structures. These > structure > > are not instantiated in memory and hence do not incur concurrent (host) > > software access. The a vast majority of the fields as read-only (as > viewed > > by the host.) The concurrency model is that hardware is the producer, > and > > the host the consumer. There is no handshake other than the host must > not > > expect the memory location to remain constant -- that is optimization > off. > > > > As for performance, these structures are not in any critical path, so he > > optimization path is correctness not performance. > > > > Do you have a recommendation for changing this code without using the > > volatile modifier? I have requirements from the hardware in the pattern > of: > > write a 1 to location x > > read from location y until it become 0 > > write a 0 to location x > > How can this work without a volatile modified on x and y? > > > > Best, > > Ed. > > Learn to use explicit memory barriers. DPDK has rmb()/wmb() just like > kernel. > > Once again good explanation of memory barriers in kernel doc. >