Hi Ferruh,

I don't think the submission system will allow your request of a single
patch with both a code change and document change since they are in
different directories. I must say I'm confused by your request. In the
current v3 which is not your preference, we split up the new device into
the 0001 and the doc on the new device in the 0002.

Your current ask of "Can you please add new device related documentation to
patch that adds new device?" was what we did back on v2. Guessing you don't
like the mention of any other devices in the FX2 addition?

It feels crazy to have to have three different patches to essentially add a
one-liner to our PCIe device alowlist! Am I making this way more
complicated than it needs to be?

We will produce the sequence of three patches in the morning.

Would a cover letter help explain when we are doing with this patch?
If there are elements that are not clear, let me know and we will work to
clarify it.

Thank you for your efforts in this and countless other DPDK pushes!

best, Shep




On Fri, Feb 10, 2023 at 9:13 PM Ferruh Yigit <ferruh.yigit@amd.com> wrote:

> On 2/11/2023 1:26 AM, Shepard Siegel wrote:
> > Update net/ark guide for clarity.
> > Include list of FX0, FX1 and FX2 PCIe devices.
> >
> > Signed-off-by: Shepard Siegel <shepard.siegel@atomicrules.com>
> > ---
> >  doc/guides/nics/ark.rst | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >
> > diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst
> > index ba00f14e80..39cd75064d 100644
> > --- a/doc/guides/nics/ark.rst
> > +++ b/doc/guides/nics/ark.rst
> > @@ -52,6 +52,10 @@ board. While specific capabilities such as number of
> physical
> >  hardware queue-pairs are negotiated; the driver is designed to
> >  remain constant over a broad and extendable feature set.
> >
> > +* FPGA Vendors Supported: AMD/Xilinx and Intel
> > +* Number of RX/TX Queue-Pairs: up to 128
> > +* PCIe Endpoint Technology: Gen3, Gen4, Gen5
> > +
> >  Intentionally, Arkville by itself DOES NOT provide common NIC
> >  capabilities such as offload or receive-side scaling (RSS).
> >  These capabilities would be viewed as a gate-level "tax" on
> > @@ -302,6 +306,20 @@ ARK PMD supports the following Arkville RTL PCIe
> instances including:
> >  * ``1d6c:101c`` - AR-ARK-SRIOV-VF [Arkville Virtual Function]
> >  * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex
> R-Tile]
> >  * ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
> > +* ``1d6c:1022`` - AR-ARKA-FX2 [Arkville 128B DPDK Data Mover for Agilex]
>
> Can you please add new device related documentation to patch that adds
> new device?
> At least above line is related to it, but if any other updates in this
> document is related to this new device that part also can go to other
> patch.
>
> Or if it make more sense you can first introduce the document update
> patch for old devices, and later add new device and new device related
> documentation, like:
>
> First patch adds:
>   +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
>   +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
>
> Second patch adds new device and appends following:
>   +* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only)
>
>
> > +
> > +Arkville RTL Core Configurations
> > +-------------------------------------
> > +
> > +Arkville's RTL core may be configured by the user for three different
> > +datapath widths to balance throughput against FPGA logic area. The ARK
> PMD
> > +has introspection on the RTL core configuration and acts accordingly.
> > +All three configurations present identical RTL user-facing AXI stream
> > +interfaces for both AMD/Xilinx and Intel FPGAs.
> > +
> > +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
> > +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
> > +* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only)
> >
> >  DPDK and Arkville Firmware Versioning
> >  -------------------------------------
> > @@ -334,6 +352,8 @@ Supported Features
> >  ------------------
> >
> >  * Dynamic ARK PMD extensions
> > +* Dynamic per-queue MBUF (re)sizing up to 32KB
> > +* SR-IOV, VF-based queue-segregation
> >  * Multiple receive and transmit queues
> >  * Jumbo frames up to 9K
> >  * Hardware Statistics
>
>