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From: Jianbo Liu <jianbo.liu@linaro.org>
Date: Thu, 15 Dec 2016 16:37:12 +0800
Message-ID: <CAP4Qi38Bp6oL7uQcOoUqFHk53ARS3Yd+RKw4w1XeHUC+aveEMw@mail.gmail.com>
To: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Cc: dev@dpdk.org, "Ananyev, Konstantin" <konstantin.ananyev@intel.com>,
Thomas Monjalon <thomas.monjalon@6wind.com>,
Bruce Richardson <bruce.richardson@intel.com>,
Jan Viktorin <viktorin@rehivetech.com>,
Santosh Shukla <santosh.shukla@caviumnetworks.com>,
Helin Zhang <helin.zhang@intel.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [dpdk-dev] [PATCH 23/28] net/ixgbe: use eal I/O device memory
read/write API
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On 14 December 2016 at 09:55, Jerin Jacob
<jerin.jacob@caviumnetworks.com> wrote:
> From: Santosh Shukla <santosh.shukla@caviumnetworks.com>
>
> Replace the raw I/O device memory read/write access with eal
> abstraction for I/O device memory read/write access to fix
> portability issues across different architectures.
>
> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> CC: Helin Zhang <helin.zhang@intel.com>
> CC: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
> drivers/net/ixgbe/base/ixgbe_osdep.h | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/net/ixgbe/base/ixgbe_osdep.h b/drivers/net/ixgbe/base/ixgbe_osdep.h
> index 77f0af5..9d16c21 100644
> --- a/drivers/net/ixgbe/base/ixgbe_osdep.h
> +++ b/drivers/net/ixgbe/base/ixgbe_osdep.h
> @@ -44,6 +44,7 @@
> #include <rte_cycles.h>
> #include <rte_log.h>
> #include <rte_byteorder.h>
> +#include <rte_io.h>
>
> #include "../ixgbe_logs.h"
> #include "../ixgbe_bypass_defines.h"
> @@ -121,16 +122,20 @@ typedef int bool;
>
> #define prefetch(x) rte_prefetch0(x)
>
> -#define IXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
> +#define IXGBE_PCI_REG(reg) ({ \
> + uint32_t __val; \
> + __val = rte_readl(reg); \
> + __val; \
> +})
>
> static inline uint32_t ixgbe_read_addr(volatile void* addr)
> {
> return rte_le_to_cpu_32(IXGBE_PCI_REG(addr));
> }
>
> -#define IXGBE_PCI_REG_WRITE(reg, value) do { \
> - IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
> -} while(0)
> +#define IXGBE_PCI_REG_WRITE(reg, value) ({ \
> + rte_writel(rte_cpu_to_le_32(value), reg); \
> +})
>
memory barrier operation is put inside IXGBE_PCI_REG_READ/WRITE in
your change, but I found rte_*mb is called before these macros in some
places.
Can you remove all these redundant calls? And please do the same
checking for other drivers.
> #define IXGBE_PCI_REG_ADDR(hw, reg) \
> ((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
> --
> 2.5.5
>