From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw0-f174.google.com (mail-yw0-f174.google.com [209.85.161.174]) by dpdk.org (Postfix) with ESMTP id 90711370 for ; Thu, 15 Dec 2016 10:53:06 +0100 (CET) Received: by mail-yw0-f174.google.com with SMTP id a10so10814907ywa.3 for ; Thu, 15 Dec 2016 01:53:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=g3LeHn5w6gpHqbIeV24axcXNnzh9v+iZSTcE8N/y+iQ=; b=FtiUfdaTvco2FMMUmZVBPsGVgxHBl/JfTl6pKOuGeBJC2p3daMEgVWo1iWM7+rxoU4 Nxf3OF6aUoZEVWN0nKuCFWBlBLe66U9v9gsZwoM0xjheBOUWv3juoTNbIDJ+L7cjL0mi hFRBwHZWUvIiESH2f24ZroKQGZGE21QNsaLew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=g3LeHn5w6gpHqbIeV24axcXNnzh9v+iZSTcE8N/y+iQ=; b=CFsOjA+OO5dRVV5Vv7KPk957PNXF90TfxUuNTrl0F/FFCzN0rZh2BrZ+J65xCKY8a/ ehwN+ln8ire7uMm3wfA2b5+cnh/XjVqZoE/8ZJxAmhTIQhBW7NdYPUjO0vXZv2iEzMs4 9pjMhl2H0IVpB3kTrnIqIMX49mu3Q58Hxl1iakfuVlGy+mP8WIWYrIq2mPQ+5I8Cqobr zUg9YMCqncirn16i+V17Qb4Dp/GKi+cLrsuFrJz2QBkdE1vkmohugtJU4q+s3swqaTAc 39oa+YAx3S2sdcNDD3Dq+Fjh3H8UHhmzid7r7BnYGinIn9hTLtJXLw3SR/OAs7xvQ0ZW 6OuQ== X-Gm-Message-State: AIkVDXKXX6ITXR9czMXohM+1sXDFhn8rzwyz4YWM64AQh5jUpkJs8Riw0KWdywdbwLm2xiH+M0f6B10it+uUiUKh X-Received: by 10.129.72.147 with SMTP id v141mr370466ywa.236.1481795585846; Thu, 15 Dec 2016 01:53:05 -0800 (PST) MIME-Version: 1.0 Received: by 10.37.193.131 with HTTP; Thu, 15 Dec 2016 01:53:05 -0800 (PST) In-Reply-To: <1481680558-4003-14-git-send-email-jerin.jacob@caviumnetworks.com> References: <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com> <1481680558-4003-14-git-send-email-jerin.jacob@caviumnetworks.com> From: Jianbo Liu Date: Thu, 15 Dec 2016 17:53:05 +0800 Message-ID: To: Jerin Jacob Cc: dev@dpdk.org, "Ananyev, Konstantin" , Thomas Monjalon , Bruce Richardson , Jan Viktorin Content-Type: text/plain; charset=UTF-8 Subject: Re: [dpdk-dev] [PATCH 13/28] eal/arm64: override I/O device read/write access for arm64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Dec 2016 09:53:06 -0000 On 14 December 2016 at 09:55, Jerin Jacob wrote: > Override the generic I/O device memory read/write access and implement it > using armv8 instructions for arm64. > > Signed-off-by: Jerin Jacob > --- > lib/librte_eal/common/include/arch/arm/rte_io.h | 4 + > lib/librte_eal/common/include/arch/arm/rte_io_64.h | 183 +++++++++++++++++++++ > 2 files changed, 187 insertions(+) > create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io_64.h > > diff --git a/lib/librte_eal/common/include/arch/arm/rte_io.h b/lib/librte_eal/common/include/arch/arm/rte_io.h > index 74c1f2c..9593b42 100644 > --- a/lib/librte_eal/common/include/arch/arm/rte_io.h > +++ b/lib/librte_eal/common/include/arch/arm/rte_io.h > @@ -38,7 +38,11 @@ > extern "C" { > #endif > > +#ifdef RTE_ARCH_64 > +#include "rte_io_64.h" > +#else > #include "generic/rte_io.h" > +#endif > > #ifdef __cplusplus > } > diff --git a/lib/librte_eal/common/include/arch/arm/rte_io_64.h b/lib/librte_eal/common/include/arch/arm/rte_io_64.h > new file mode 100644 > index 0000000..09e7a89 > --- /dev/null > +++ b/lib/librte_eal/common/include/arch/arm/rte_io_64.h > @@ -0,0 +1,183 @@ > +/* > + * BSD LICENSE > + * > + * Copyright (C) Cavium networks Ltd. 2016. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Cavium networks nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > + */ > + > +#ifndef _RTE_IO_ARM64_H_ > +#define _RTE_IO_ARM64_H_ > + > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +#include > + > +#define RTE_OVERRIDE_IO_H > + > +#include "generic/rte_io.h" > +#include "rte_atomic_64.h" > + > +static inline __attribute__((always_inline)) uint8_t > +__rte_arm64_readb(const volatile void *addr) > +{ > + uint8_t val; > + > + asm volatile( > + "ldrb %w[val], [%x[addr]]" > + : [val] "=r" (val) > + : [addr] "r" (addr)); > + return val; > +} > + > +static inline __attribute__((always_inline)) uint16_t > +__rte_arm64_readw(const volatile void *addr) > +{ > + uint16_t val; > + > + asm volatile( > + "ldrh %w[val], [%x[addr]]" > + : [val] "=r" (val) > + : [addr] "r" (addr)); > + return val; > +} > + > +static inline __attribute__((always_inline)) uint32_t > +__rte_arm64_readl(const volatile void *addr) > +{ > + uint32_t val; > + > + asm volatile( > + "ldr %w[val], [%x[addr]]" > + : [val] "=r" (val) > + : [addr] "r" (addr)); > + return val; > +} > + > +static inline __attribute__((always_inline)) uint64_t > +__rte_arm64_readq(const volatile void *addr) > +{ > + uint64_t val; > + > + asm volatile( > + "ldr %x[val], [%x[addr]]" > + : [val] "=r" (val) > + : [addr] "r" (addr)); > + return val; > +} > + > +static inline __attribute__((always_inline)) void > +__rte_arm64_writeb(uint8_t val, volatile void *addr) > +{ > + asm volatile( > + "strb %w[val], [%x[addr]]" > + : > + : [val] "r" (val), [addr] "r" (addr)); > +} > + > +static inline __attribute__((always_inline)) void > +__rte_arm64_writew(uint16_t val, volatile void *addr) > +{ > + asm volatile( > + "strh %w[val], [%x[addr]]" > + : > + : [val] "r" (val), [addr] "r" (addr)); > +} > + > +static inline __attribute__((always_inline)) void > +__rte_arm64_writel(uint32_t val, volatile void *addr) > +{ > + asm volatile( > + "str %w[val], [%x[addr]]" > + : > + : [val] "r" (val), [addr] "r" (addr)); > +} > + > +static inline __attribute__((always_inline)) void > +__rte_arm64_writeq(uint64_t val, volatile void *addr) > +{ > + asm volatile( > + "str %x[val], [%x[addr]]" > + : > + : [val] "r" (val), [addr] "r" (addr)); > +} I'm not quite sure about these overridings. Can you explain the benefit to do so? > + > +#define rte_readb_relaxed(addr) \ > + ({ uint8_t __v = __rte_arm64_readb(addr); __v; }) > + > +#define rte_readw_relaxed(addr) \ > + ({ uint16_t __v = __rte_arm64_readw(addr); __v; }) > + > +#define rte_readl_relaxed(addr) \ > + ({ uint32_t __v = __rte_arm64_readl(addr); __v; }) > + > +#define rte_readq_relaxed(addr) \ > + ({ uint64_t __v = __rte_arm64_readq(addr); __v; }) > + > +#define rte_writeb_relaxed(value, addr) \ > + ({ __rte_arm64_writeb(value, addr); }) > + > +#define rte_writew_relaxed(value, addr) \ > + ({ __rte_arm64_writew(value, addr); }) > + > +#define rte_writel_relaxed(value, addr) \ > + ({ __rte_arm64_writel(value, addr); }) > + > +#define rte_writeq_relaxed(value, addr) \ > + ({ __rte_arm64_writeq(value, addr); }) > + > +#define rte_readb(addr) \ > + ({ uint8_t __v = __rte_arm64_readb(addr); rte_io_rmb(); __v; }) > + > +#define rte_readw(addr) \ > + ({ uint16_t __v = __rte_arm64_readw(addr); rte_io_rmb(); __v; }) > + > +#define rte_readl(addr) \ > + ({ uint32_t __v = __rte_arm64_readl(addr); rte_io_rmb(); __v; }) > + > +#define rte_readq(addr) \ > + ({ uint64_t __v = __rte_arm64_readq(addr); rte_io_rmb(); __v; }) > + > +#define rte_writeb(value, addr) \ > + ({ rte_io_wmb(); rte_writeb_relaxed(value, addr); }) > + > +#define rte_writew(value, addr) \ > + ({ rte_io_wmb(); rte_writew_relaxed(value, addr); }) > + > +#define rte_writel(value, addr) \ > + ({ rte_io_wmb(); rte_writel_relaxed(value, addr); }) > + > +#define rte_writeq(value, addr) \ > + ({ rte_io_wmb(); rte_writeq_relaxed(value, addr); }) > + > +#ifdef __cplusplus > +} > +#endif > + > +#endif /* _RTE_IO_ARM64_H_ */ > -- > 2.5.5 >