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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CH3PR11MB8362.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 21b2ee55-e010-40af-bf54-08dbb8b943d4 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Sep 2023 02:36:44.9179 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Le4SkMGZSf/FG3EWWRc1qnriRZYhLWK30Yjkn1YPZHhgb7ZvRBnDNPdX8rD6XanXe58MNpXhLbI4UgnSI3v+Eg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR11MB7692 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: David Marchand > Sent: Thursday, September 14, 2023 8:36 PM > To: dev@dpdk.org > Cc: thomas@monjalon.net; ferruh.yigit@amd.com; Xia, Chenbo > ; nipun.gupta@amd.com; Richardson, Bruce > ; Sevincer, Abdullah > ; Gaetan Rivet > Subject: [PATCH v3 14/15] pci: define some AER constants >=20 > Define some Advanced Error Reporting constants and use them in existing > drivers. >=20 > Signed-off-by: David Marchand > Acked-by: Bruce Richardson > --- > drivers/event/dlb2/pf/dlb2_main.c | 10 +++------- > lib/pci/rte_pci.h | 5 +++++ > 2 files changed, 8 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/event/dlb2/pf/dlb2_main.c > b/drivers/event/dlb2/pf/dlb2_main.c > index 187a356c24..aa03e4c311 100644 > --- a/drivers/event/dlb2/pf/dlb2_main.c > +++ b/drivers/event/dlb2/pf/dlb2_main.c > @@ -27,10 +27,6 @@ > #define NO_OWNER_VF 0 /* PF ONLY! */ > #define NOT_VF_REQ false /* PF ONLY! */ >=20 > -#define DLB2_PCI_ERR_ROOT_STATUS 0x30 > -#define DLB2_PCI_ERR_COR_STATUS 0x10 > -#define DLB2_PCI_ERR_UNCOR_STATUS 0x4 > - > static int > dlb2_pf_init_driver_state(struct dlb2_dev *dlb2_dev) > { > @@ -399,7 +395,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > if (err_cap_offset >=3D 0) { > uint32_t tmp; >=20 > - off =3D err_cap_offset + DLB2_PCI_ERR_ROOT_STATUS; > + off =3D err_cap_offset + RTE_PCI_ERR_ROOT_STATUS; > if (rte_pci_read_config(pdev, &tmp, 4, off) !=3D 4) > tmp =3D 0; >=20 > @@ -410,7 +406,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > return ret; > } >=20 > - off =3D err_cap_offset + DLB2_PCI_ERR_COR_STATUS; > + off =3D err_cap_offset + RTE_PCI_ERR_COR_STATUS; > if (rte_pci_read_config(pdev, &tmp, 4, off) !=3D 4) > tmp =3D 0; >=20 > @@ -421,7 +417,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > return ret; > } >=20 > - off =3D err_cap_offset + DLB2_PCI_ERR_UNCOR_STATUS; > + off =3D err_cap_offset + RTE_PCI_ERR_UNCOR_STATUS; > if (rte_pci_read_config(pdev, &tmp, 4, off) !=3D 4) > tmp =3D 0; >=20 > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h > index 6bbcad20f2..69e932d910 100644 > --- a/lib/pci/rte_pci.h > +++ b/lib/pci/rte_pci.h > @@ -102,6 +102,11 @@ extern "C" { > #define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV */ > #define RTE_PCI_EXT_CAP_ID_PRI 0x13 /* Page Request Interface > */ >=20 > +/* Advanced Error Reporting (RTE_PCI_EXT_CAP_ID_ERR) */ > +#define RTE_PCI_ERR_UNCOR_STATUS 0x04 /* Uncorrectable Error Status */ > +#define RTE_PCI_ERR_COR_STATUS 0x10 /* Correctable Error > Status */ > +#define RTE_PCI_ERR_ROOT_STATUS 0x30 > + > /* Access Control Service (RTE_PCI_EXT_CAP_ID_ACS) */ > #define RTE_PCI_ACS_CAP 0x04 /* ACS Capability Register > */ > #define RTE_PCI_ACS_CTRL 0x06 /* ACS Control Register */ > -- > 2.41.0 Reviewed-by: Chenbo Xia =20