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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CH3PR11MB8362.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 99c8eb89-a648-476a-4204-08dbafa599ec X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Sep 2023 13:23:18.9477 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: L1b/fUY9usIeO2qiAbqMbTH2k/seFh9DxYqtPgeveIjwKg6FNQuPADxDFmr3cOC7ZgPIIwPmPr66mEe2MvUkSg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB7328 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi David, > -----Original Message----- > From: David Marchand > Sent: Monday, August 21, 2023 7:36 PM > To: dev@dpdk.org > Cc: thomas@monjalon.net; ferruh.yigit@amd.com; Xia, Chenbo > ; nipun.gupta@amd.com; Richardson, Bruce > ; McDaniel, Timothy > ; Gaetan Rivet > Subject: [PATCH v2 11/15] pci: define some extended capability constants >=20 > Define some PCI extended capability constants and use them in existing > drivers. >=20 > Signed-off-by: David Marchand > Acked-by: Bruce Richardson > --- > drivers/event/dlb2/pf/dlb2_main.c | 7 ++----- > lib/pci/rte_pci.h | 4 +++- > 2 files changed, 5 insertions(+), 6 deletions(-) >=20 > diff --git a/drivers/event/dlb2/pf/dlb2_main.c > b/drivers/event/dlb2/pf/dlb2_main.c > index 8d960edef6..29e3001627 100644 > --- a/drivers/event/dlb2/pf/dlb2_main.c > +++ b/drivers/event/dlb2/pf/dlb2_main.c > @@ -27,9 +27,6 @@ > #define NO_OWNER_VF 0 /* PF ONLY! */ > #define NOT_VF_REQ false /* PF ONLY! */ >=20 > -#define DLB2_PCI_EXT_CAP_ID_PRI 0x13 > -#define DLB2_PCI_EXT_CAP_ID_ACS 0xD > - > #define DLB2_PCI_PRI_CTRL_ENABLE 0x1 > #define DLB2_PCI_PRI_ALLOC_REQ 0xC > #define DLB2_PCI_PRI_CTRL 0x4 > @@ -263,7 +260,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > if (rte_pci_read_config(pdev, &slt_word2, 2, off) !=3D 2) > slt_word2 =3D 0; >=20 > - off =3D DLB2_PCI_EXT_CAP_ID_PRI; > + off =3D RTE_PCI_EXT_CAP_ID_PRI; > pri_cap_offset =3D rte_pci_find_ext_capability(pdev, off); >=20 > if (pri_cap_offset >=3D 0) { > @@ -490,7 +487,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > } > } >=20 > - off =3D DLB2_PCI_EXT_CAP_ID_ACS; > + off =3D RTE_PCI_EXT_CAP_ID_ACS; > acs_cap_offset =3D rte_pci_find_ext_capability(pdev, off); >=20 > if (acs_cap_offset >=3D 0) { > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h > index a82f073a7d..d2f7a96f17 100644 > --- a/lib/pci/rte_pci.h > +++ b/lib/pci/rte_pci.h > @@ -97,9 +97,11 @@ extern "C" { >=20 > #define RTE_PCI_EXT_CAP_ID_ERR 0x01 /* Advanced Error > Reporting */ > #define RTE_PCI_EXT_CAP_ID_DSN 0x03 /* Device Serial Number */ > +#define RTE_PCI_EXT_CAP_ID_ACS 0x0d /* Access Control Services > */ > #define RTE_PCI_EXT_CAP_ID_SRIOV 0x10 /* SR-IOV*/ Maybe we could also do the small clean-up: it should be one space after 'IO= V' :) With this fixed: Reviewed-by: Chenbo Xia > +#define RTE_PCI_EXT_CAP_ID_PRI 0x13 /* Page Request Interface > */ >=20 > -/* Single Root I/O Virtualization */ > +/* Single Root I/O Virtualization (RTE_PCI_EXT_CAP_ID_SRIOV) */ > #define RTE_PCI_SRIOV_CAP 0x04 /* SR-IOV Capabilities */ > #define RTE_PCI_SRIOV_CTRL 0x08 /* SR-IOV Control */ > #define RTE_PCI_SRIOV_INITIAL_VF 0x0c /* Initial VFs */ > -- > 2.41.0