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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CH3PR11MB8362.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ebe994de-57ed-4770-1596-08dbafa492da X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Sep 2023 13:15:57.5782 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rmJ5OfnUwAjHKnmtnjsq4Ive4dDm5X/XldZFyeTk+fMEWsNGxMBWVLMMK8dARFWdnwRKJHU4khndjKPTeN9Kpg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB7659 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: David Marchand > Sent: Monday, August 21, 2023 7:36 PM > To: dev@dpdk.org > Cc: thomas@monjalon.net; ferruh.yigit@amd.com; Xia, Chenbo > ; nipun.gupta@amd.com; Richardson, Bruce > ; Burakov, Anatoly ; > McDaniel, Timothy ; Gaetan Rivet > > Subject: [PATCH v2 07/15] pci: define some command constants >=20 > Define some PCI command constants and use them in existing drivers. >=20 > Signed-off-by: David Marchand > Acked-by: Bruce Richardson > --- > drivers/bus/pci/linux/pci_vfio.c | 8 ++++---- > drivers/event/dlb2/pf/dlb2_main.c | 8 +++----- > lib/pci/rte_pci.h | 6 ++++-- > 3 files changed, 11 insertions(+), 11 deletions(-) >=20 > diff --git a/drivers/bus/pci/linux/pci_vfio.c > b/drivers/bus/pci/linux/pci_vfio.c > index 7881b7a946..bf91492dd9 100644 > --- a/drivers/bus/pci/linux/pci_vfio.c > +++ b/drivers/bus/pci/linux/pci_vfio.c > @@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device > *dev, int dev_fd) > return -1; > } >=20 > - ret =3D pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND); > + ret =3D pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); >=20 > if (ret !=3D sizeof(cmd)) { > RTE_LOG(ERR, EAL, "Cannot read command from PCI config > space!\n"); > return -1; > } >=20 > - if (cmd & PCI_COMMAND_MEMORY) > + if (cmd & RTE_PCI_COMMAND_MEMORY) > return 0; >=20 > - cmd |=3D PCI_COMMAND_MEMORY; > - ret =3D pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND); > + cmd |=3D RTE_PCI_COMMAND_MEMORY; > + ret =3D pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND); >=20 > if (ret !=3D sizeof(cmd)) { > RTE_LOG(ERR, EAL, "Cannot write command to PCI config > space!\n"); > diff --git a/drivers/event/dlb2/pf/dlb2_main.c > b/drivers/event/dlb2/pf/dlb2_main.c > index c6606a9bee..6dbaa2ff97 100644 > --- a/drivers/event/dlb2/pf/dlb2_main.c > +++ b/drivers/event/dlb2/pf/dlb2_main.c > @@ -33,7 +33,6 @@ > #define DLB2_PCI_EXP_DEVCTL2 40 > #define DLB2_PCI_LNKCTL2 48 > #define DLB2_PCI_SLTCTL2 56 > -#define DLB2_PCI_CMD 4 > #define DLB2_PCI_EXP_DEVSTA 10 > #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20 > #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000 > @@ -47,7 +46,6 @@ > #define DLB2_PCI_ERR_ROOT_STATUS 0x30 > #define DLB2_PCI_ERR_COR_STATUS 0x10 > #define DLB2_PCI_ERR_UNCOR_STATUS 0x4 > -#define DLB2_PCI_COMMAND_INTX_DISABLE 0x400 > #define DLB2_PCI_ACS_CAP 0x4 > #define DLB2_PCI_ACS_CTRL 0x6 > #define DLB2_PCI_ACS_SV 0x1 > @@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) >=20 > /* clear the PCI command register before issuing the FLR */ >=20 > - off =3D DLB2_PCI_CMD; > + off =3D RTE_PCI_COMMAND; > cmd =3D 0; > if (rte_pci_write_config(pdev, &cmd, 2, off) !=3D 2) { > DLB2_LOG_ERR("[%s()] failed to write the pci command\n", > @@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev) > } > } >=20 > - off =3D DLB2_PCI_CMD; > + off =3D RTE_PCI_COMMAND; > if (rte_pci_read_config(pdev, &cmd, 2, off) =3D=3D 2) { > - cmd &=3D ~DLB2_PCI_COMMAND_INTX_DISABLE; > + cmd &=3D ~RTE_PCI_COMMAND_INTX_DISABLE; > if (rte_pci_write_config(pdev, &cmd, 2, off) !=3D 2) { > DLB2_LOG_ERR("[%s()] failed to write the pci command\n", > __func__); > diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h > index 41dc725cc4..9eb8f85ceb 100644 > --- a/lib/pci/rte_pci.h > +++ b/lib/pci/rte_pci.h > @@ -37,8 +37,10 @@ extern "C" { > #define RTE_PCI_STATUS 0x06 /* 16 bits */ > #define RTE_PCI_CAPABILITY_LIST 0x34 /* 32 bits */ >=20 > -/* PCI Command Register */ > -#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */ > +/* PCI Command Register (RTE_PCI_COMMAND) */ > +#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in > Memory space */ > +#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */ > +#define RTE_PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable > */ >=20 > /* PCI Status Register (RTE_PCI_STATUS) */ > #define RTE_PCI_STATUS_CAP_LIST 0x10 /* Support Capability List > */ > -- > 2.41.0 Reviewed-by: Chenbo Xia =20