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From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: "Minggang(Gavin) Li" <gavinl@nvidia.com>, Matan Azrad <matan@nvidia.com>,
Slava Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>,
"NBU-Contact-Thomas Monjalon (EXTERNAL)" <thomas@monjalon.net>, Bing Zhao
<bingz@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>, Alex Vesker
<valex@nvidia.com>, rongwei liu <rongweil@nvidia.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, Raslan Darawsheh <rasland@nvidia.com>
Subject: RE: [PATCH 1/2] doc: fix mlx5 VXLAN matching limitations
Thread-Topic: [PATCH 1/2] doc: fix mlx5 VXLAN matching limitations
Thread-Index: AQHbgfCf4uDl/wtsXEWhkow9eqNxcLNM43tw
Date: Tue, 18 Feb 2025 10:56:22 +0000
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References: <20250218103322.166461-1-gavinl@nvidia.com>
<20250218103322.166461-2-gavinl@nvidia.com>
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Errors-To: dev-bounces@dpdk.org
> -----Original Message-----
> From: Minggang(Gavin) Li <gavinl@nvidia.com>
> Sent: Tuesday, February 18, 2025 11:33
> To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-Contact-Thomas
> Monjalon (EXTERNAL) <thomas@monjalon.net>; Dariusz Sosnowski
> <dsosnowski@nvidia.com>; Bing Zhao <bingz@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Alex Vesker <valex@nvidia.com>; rongwei liu
> <rongweil@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH 1/2] doc: fix mlx5 VXLAN matching limitations
>=20
> P bit of VXLAN-GPE and G bit of VXLAN-GBP should be set when matching the
> protocols.
>=20
> Fixes: 49765b78c81b ("net/mlx5/hws: match all VXLAN fields")
> Signed-off-by: Minggang Li(Gavin) <gavinl@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Best regards,
Dariusz Sosnowski