[PATCH 1/1] doc: virtual function MTU settings has no meaning

[PATCH 1/1] doc: virtual function MTU settings has no meaning

[Viacheslav Ovsiienko]

There is the mlx5 NIC limitations - configuring MTU
for PCI Virtual Function has no meaning. The actual maximal
packet size in VF's receiving is limited by MTU configured
on the related PCI Physical Function, the DPDK datapath
running over VF should be prepared to handle packets
of this maximal size.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 doc/guides/nics/mlx5.rst | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 8d1a1311d4..c7dcb74da7 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -191,6 +191,13 @@ Limitations
     - IPv4/TCP with CVLAN filtering
     - L4 steering rules for port RSS of UDP, TCP and IP
 
+- PCI Virtual Function MTU:
+
+  Configuring MTU for PCI Virtual Function has no meaning.
+  The actual maximal packet size in VF's receiving is limited by MTU configured
+  on the related PCI Physical Function, the DPDK datapath running over VF should be
+  prepared to handle packets of this maximal size.
+
 - For secondary process:
 
   - Forked secondary process not supported.
-- 
2.34.1

Re: [PATCH 1/1] doc: virtual function MTU settings has no meaning

[Stephen Hemminger]

On Mon, 28 Oct 2024 16:45:09 +0200
Viacheslav Ovsiienko <viacheslavo@nvidia.com> wrote:

> There is the mlx5 NIC limitations - configuring MTU
> for PCI Virtual Function has no meaning. The actual maximal
> packet size in VF's receiving is limited by MTU configured
> on the related PCI Physical Function, the DPDK datapath
> running over VF should be prepared to handle packets
> of this maximal size.
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---
>  doc/guides/nics/mlx5.rst | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
> index 8d1a1311d4..c7dcb74da7 100644
> --- a/doc/guides/nics/mlx5.rst
> +++ b/doc/guides/nics/mlx5.rst
> @@ -191,6 +191,13 @@ Limitations
>      - IPv4/TCP with CVLAN filtering
>      - L4 steering rules for port RSS of UDP, TCP and IP
>  
> +- PCI Virtual Function MTU:
> +
> +  Configuring MTU for PCI Virtual Function has no meaning.
> +  The actual maximal packet size in VF's receiving is limited by MTU configured
> +  on the related PCI Physical Function, the DPDK datapath running over VF should be
> +  prepared to handle packets of this maximal size.
> +

This is true of many drivers not just MLX5.

And it is generally true that Maximum Receive Unit (MRU) can
be larger than Maximum Transmit Unit (MTU).

I would rather see a more precise definition of MTU in DPDK show up
in ethdev documentation than sprinkling bits in each vendor driver.

RE: [PATCH 1/1] doc: virtual function MTU settings has no meaning

[Slava Ovsiienko]

> -----Original Message-----
> From: Stephen Hemminger <stephen@networkplumber.org>
> Sent: Monday, October 28, 2024 5:52 PM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>
> Subject: Re: [PATCH 1/1] doc: virtual function MTU settings has no meaning
> 
> On Mon, 28 Oct 2024 16:45:09 +0200
> Viacheslav Ovsiienko <viacheslavo@nvidia.com> wrote:
> 
> > There is the mlx5 NIC limitations - configuring MTU for PCI Virtual
> > Function has no meaning. The actual maximal packet size in VF's
> > receiving is limited by MTU configured on the related PCI Physical
> > Function, the DPDK datapath running over VF should be prepared to
> > handle packets of this maximal size.
> >
> > Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> > ---
> >  doc/guides/nics/mlx5.rst | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index
> > 8d1a1311d4..c7dcb74da7 100644
> > --- a/doc/guides/nics/mlx5.rst
> > +++ b/doc/guides/nics/mlx5.rst
> > @@ -191,6 +191,13 @@ Limitations
> >      - IPv4/TCP with CVLAN filtering
> >      - L4 steering rules for port RSS of UDP, TCP and IP
> >
> > +- PCI Virtual Function MTU:
> > +
> > +  Configuring MTU for PCI Virtual Function has no meaning.
> > +  The actual maximal packet size in VF's receiving is limited by MTU
> > + configured  on the related PCI Physical Function, the DPDK datapath
> > + running over VF should be  prepared to handle packets of this maximal
> size.
> > +
> 
> This is true of many drivers not just MLX5.
> 
> And it is generally true that Maximum Receive Unit (MRU) can be larger than
> Maximum Transmit Unit (MTU).
> 
> I would rather see a more precise definition of MTU in DPDK show up in
> ethdev documentation than sprinkling bits in each vendor driver.

There is the specifics for mlx5 - it operates in "bifurcated mode",
mlx5 PMD inherits/configures the MTU system settings, not the hardware ones  directly.
So, MTU naming looks like to be correct.

And, from time to time, we see user risen questions about VF MTU,
especially in virtualized environment. MTU is configured (either with system utilities
or with DPDK) and has no effect, embarrassing the users.

I have no objections to update the generic rte_ethdev chapter,
but it would require attention from other vendors as well.

With best regards,
Slava

Re: [PATCH 1/1] doc: virtual function MTU settings has no meaning

[Raslan Darawsheh]

Hi,

From: Slava Ovsiienko <viacheslavo@nvidia.com>
Sent: Monday, October 28, 2024 4:45 PM
To: dev@dpdk.org
Cc: Raslan Darawsheh; Matan Azrad; Suanming Mou
Subject: [PATCH 1/1] doc: virtual function MTU settings has no meaning

There is the mlx5 NIC limitations - configuring MTU
for PCI Virtual Function has no meaning. The actual maximal
packet size in VF's receiving is limited by MTU configured
on the related PCI Physical Function, the DPDK datapath
running over VF should be prepared to handle packets
of this maximal size.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh