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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO1PR11MB5172.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4ef9bfd5-afd0-4b7b-01df-08da2d794e28 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 May 2022 02:53:45.1259 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jMfQzxblH9Q7t7sNZJq1NzIxcgC9tSBLLgnY3REjIWWbxk7yHbgIqlyj1sj/ZWrQGnW8Si8N1qixgugPf5IR2A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR11MB4198 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Pavan Nikhilesh > Sent: Friday, April 29, 2022 9:17 AM > To: ruifeng.wang@arm.com; Wang, Yipeng1 ; > Gobriel, Sameh ; Richardson, Bruce > ; Medvedkin, Vladimir > > Cc: jerinj@marvell.com; dev@dpdk.org; Pavan Nikhilesh > > Subject: [PATCH v8 2/2] hash: unify crc32 selection for x86 and Arm >=20 > Merge crc32 hash calculation public API implementation for x86 and Arm. > Select the best available CRC32 algorithm when unsupported algorithm on a > given CPU architecture is requested by an application. >=20 > Previously, if an application directly includes `rte_crc_arm64.h` without > including `rte_hash_crc.h` it will fail to compile. >=20 > Signed-off-by: Pavan Nikhilesh > Reviewed-by: Ruifeng Wang > --- > lib/hash/meson.build | 1 + > lib/hash/rte_crc_arm64.h | 69 +++--------------- > lib/hash/rte_crc_generic.h | 72 ++++++++++++++++++ > lib/hash/rte_crc_x86.h | 89 +++++++++++++++++++++++ > lib/hash/rte_hash_crc.h | 145 ++++++++++--------------------------- > 5 files changed, 210 insertions(+), 166 deletions(-) create mode 100644 > lib/hash/rte_crc_generic.h >=20 > diff --git a/lib/hash/meson.build b/lib/hash/meson.build index > ff13e2c7f9..b36c8b0c01 100644 > --- a/lib/hash/meson.build > +++ b/lib/hash/meson.build > @@ -13,6 +13,7 @@ indirect_headers +=3D files( > 'rte_crc_sw.h', > 'rte_crc_x86.h', > 'rte_crc_arm64.h', > + 'rte_crc_generic.h', > 'rte_thash_x86_gfni.h', > ) >=20 > diff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h index > b4628cfc09..172894335f 100644 > --- a/lib/hash/rte_crc_arm64.h > +++ b/lib/hash/rte_crc_arm64.h > @@ -2,23 +2,8 @@ > * Copyright(c) 2015 Cavium, Inc > */ >=20 > -#ifndef _RTE_CRC_ARM64_H_ > -#define _RTE_CRC_ARM64_H_ > - > -/** > - * @file > - * > - * RTE CRC arm64 Hash > - */ > - > -#ifdef __cplusplus > -extern "C" { > -#endif > - > -#include > -#include > -#include > -#include > +#ifndef _HASH_CRC_ARM64_H_ > +#define _HASH_CRC_ARM64_H_ >=20 > static inline uint32_t > crc32c_arm64_u8(uint8_t data, uint32_t init_val) @@ -61,40 +46,8 @@ > crc32c_arm64_u64(uint64_t data, uint32_t init_val) } >=20 > /** > - * Allow or disallow use of arm64 SIMD instrinsics for CRC32 hash > - * calculation. > - * > - * @param alg > - * An OR of following flags: > - * - (CRC32_SW) Don't use arm64 crc intrinsics > - * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available > - * > - */ > -static inline void > -rte_hash_crc_set_alg(uint8_t alg) > -{ > - switch (alg) { > - case CRC32_ARM64: > - if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) > - alg =3D CRC32_SW; > - /* fall-through */ > - case CRC32_SW: > - crc32_alg =3D alg; > - /* fall-through */ > - default: > - break; > - } > -} > - > -/* Setting the best available algorithm */ > -RTE_INIT(rte_hash_crc_init_alg) > -{ > - rte_hash_crc_set_alg(CRC32_ARM64); > -} > - > -/** > - * Use single crc32 instruction to perform a hash on a 1 byte value. > - * Fall back to software crc32 implementation in case arm64 crc intrinsi= cs is > + * Use single crc32 instruction to perform a hash on a byte value. > + * Fall back to software crc32 implementation in case ARM CRC is > * not supported > * > * @param data > @@ -115,7 +68,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val) >=20 > /** > * Use single crc32 instruction to perform a hash on a 2 bytes value. > - * Fall back to software crc32 implementation in case arm64 crc intrinsi= cs is > + * Fall back to software crc32 implementation in case ARM CRC is > * not supported > * > * @param data > @@ -136,7 +89,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val) >=20 > /** > * Use single crc32 instruction to perform a hash on a 4 byte value. > - * Fall back to software crc32 implementation in case arm64 crc intrinsi= cs is > + * Fall back to software crc32 implementation in case ARM CRC is > * not supported > * > * @param data > @@ -157,7 +110,7 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) >=20 > /** > * Use single crc32 instruction to perform a hash on a 8 byte value. > - * Fall back to software crc32 implementation in case arm64 crc intrinsi= cs is > + * Fall back to software crc32 implementation in case ARM CRC is > * not supported > * > * @param data > @@ -170,14 +123,10 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val= ) > static inline uint32_t rte_hash_crc_8byte(uint64_t data, uint32_t init_v= al) { > - if (likely(crc32_alg =3D=3D CRC32_ARM64)) > + if (likely(crc32_alg & CRC32_ARM64)) > return crc32c_arm64_u64(data, init_val); >=20 > return crc32c_2words(data, init_val); > } >=20 > -#ifdef __cplusplus > -} > -#endif > - > -#endif /* _RTE_CRC_ARM64_H_ */ > +#endif /* _HASH_CRC_ARM64_H_ */ > diff --git a/lib/hash/rte_crc_generic.h b/lib/hash/rte_crc_generic.h new = file > mode 100644 index 0000000000..0c55947896 > --- /dev/null > +++ b/lib/hash/rte_crc_generic.h > @@ -0,0 +1,72 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2022 Marvell. > + */ > + > +#ifndef _HASH_CRC_GENERIC_H_ > +#define _HASH_CRC_GENERIC_H_ > + > +/** > + * Software crc32 implementation for 1 byte value. > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) { > + return crc32c_1byte(data, init_val); > +} > + > +/** > + * Software crc32 implementation for 2 byte value. > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) { > + return crc32c_2bytes(data, init_val); > +} > + > +/** > + * Software crc32 implementation for 4 byte value. > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) { > + return crc32c_1word(data, init_val); > +} > + > +/** > + * Software crc32 implementation for 8 byte value. > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { > + return crc32c_2words(data, init_val); > +} > + > +#endif > diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h index > b80a742afa..19eb3584e7 100644 > --- a/lib/hash/rte_crc_x86.h > +++ b/lib/hash/rte_crc_x86.h > @@ -59,4 +59,93 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val) > return (uint32_t)init_val; > } >=20 > +/** > + * Use single crc32 instruction to perform a hash on a byte value. > + * Fall back to software crc32 implementation in case SSE4.2 is > + * not supported > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) { > + if (likely(crc32_alg & CRC32_SSE42)) > + return crc32c_sse42_u8(data, init_val); > + > + return crc32c_1byte(data, init_val); > +} > + > +/** > + * Use single crc32 instruction to perform a hash on a 2 bytes value. > + * Fall back to software crc32 implementation in case SSE4.2 is > + * not supported > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) { > + if (likely(crc32_alg & CRC32_SSE42)) > + return crc32c_sse42_u16(data, init_val); > + > + return crc32c_2bytes(data, init_val); > +} > + > +/** > + * Use single crc32 instruction to perform a hash on a 4 byte value. > + * Fall back to software crc32 implementation in case SSE4.2 is > + * not supported > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) { > + if (likely(crc32_alg & CRC32_SSE42)) > + return crc32c_sse42_u32(data, init_val); > + > + return crc32c_1word(data, init_val); > +} > + > +/** > + * Use single crc32 instruction to perform a hash on a 8 byte value. > + * Fall back to software crc32 implementation in case SSE4.2 is > + * not supported > + * > + * @param data > + * Data to perform hash on. > + * @param init_val > + * Value to initialise hash generator. > + * @return > + * 32bit calculated hash value. > + */ > +static inline uint32_t > +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { #ifdef > +RTE_ARCH_X86_64 > + if (likely(crc32_alg =3D=3D CRC32_SSE42_x64)) > + return crc32c_sse42_u64(data, init_val); #endif > + > + if (likely(crc32_alg & CRC32_SSE42)) > + return crc32c_sse42_u64_mimic(data, init_val); > + > + return crc32c_2words(data, init_val); > +} > + > #endif > diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index > 308fdde414..cd9ec17082 100644 > --- a/lib/hash/rte_hash_crc.h > +++ b/lib/hash/rte_hash_crc.h > @@ -16,10 +16,12 @@ extern "C" { > #endif >=20 > #include > -#include > -#include > + > #include > #include > +#include > +#include > +#include >=20 > #include "rte_crc_sw.h" >=20 > @@ -33,136 +35,67 @@ static uint8_t crc32_alg =3D CRC32_SW; >=20 > #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) > #include "rte_crc_arm64.h" > -#else > +#elif defined(RTE_ARCH_X86) > #include "rte_crc_x86.h" > +#else > +#include "rte_crc_generic.h" > +#endif >=20 > /** > - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash > + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash > * calculation. > * > * @param alg > * An OR of following flags: > - * - (CRC32_SW) Don't use SSE4.2 intrinsics > + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non- > [x86/ARMv8]) > * - (CRC32_SSE42) Use SSE4.2 intrinsics if available > - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt) > + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (defau= lt x86) > + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8= ) > * > */ > static inline void > rte_hash_crc_set_alg(uint8_t alg) > { > -#if defined(RTE_ARCH_X86) > - if (alg =3D=3D CRC32_SSE42_x64 && > - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > - alg =3D CRC32_SSE42; > -#endif > - crc32_alg =3D alg; > -} > + crc32_alg =3D CRC32_SW; >=20 > -/* Setting the best available algorithm */ > -RTE_INIT(rte_hash_crc_init_alg) > -{ > - rte_hash_crc_set_alg(CRC32_SSE42_x64); > -} > + if (alg =3D=3D CRC32_SW) > + return; >=20 > -/** > - * Use single crc32 instruction to perform a hash on a byte value. > - * Fall back to software crc32 implementation in case SSE4.2 is > - * not supported > - * > - * @param data > - * Data to perform hash on. > - * @param init_val > - * Value to initialise hash generator. > - * @return > - * 32bit calculated hash value. > - */ > -static inline uint32_t > -rte_hash_crc_1byte(uint8_t data, uint32_t init_val) -{ -#if defined > RTE_ARCH_X86 > - if (likely(crc32_alg & CRC32_SSE42)) > - return crc32c_sse42_u8(data, init_val); > -#endif > - > - return crc32c_1byte(data, init_val); > -} > - > -/** > - * Use single crc32 instruction to perform a hash on a 2 bytes value. > - * Fall back to software crc32 implementation in case SSE4.2 is > - * not supported > - * > - * @param data > - * Data to perform hash on. > - * @param init_val > - * Value to initialise hash generator. > - * @return > - * 32bit calculated hash value. > - */ > -static inline uint32_t > -rte_hash_crc_2byte(uint16_t data, uint32_t init_val) -{ #if defined > RTE_ARCH_X86 > - if (likely(crc32_alg & CRC32_SSE42)) > - return crc32c_sse42_u16(data, init_val); > + if (!(alg & CRC32_SSE42_x64)) > + RTE_LOG(WARNING, HASH, > + "Unsupported CRC32 algorithm requested using > CRC32_x64/CRC32_SSE42\n"); [Wang, Yipeng] I have a question regarding this logic. For the set_alg API, how about if user specify to use sse42 (not the 64bit = version) algorithm on a em64 CPU, does it also warn "unsupported algorithm"= and force user to use the x64 version? It seems behaves differently than the current API definition.=20 > + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) > + crc32_alg =3D CRC32_SSE42; > + else > + crc32_alg =3D CRC32_SSE42_x64; > #endif >=20 > - return crc32c_2bytes(data, init_val); > -} > -