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Fri, 16 Jul 2021 19:40:27 +0000 From: Akhil Goyal To: Shiri Kuzin , "dev@dpdk.org" CC: "matan@nvidia.com" , "suanmingm@nvidia.com" , "david.marchand@redhat.com" Thread-Topic: [EXT] [PATCH v8 03/16] crypto/mlx5: add session operations Thread-Index: AQHXeZhbnCd1uXT6C0q3QumS/R7iw6tGAAiA Date: Fri, 16 Jul 2021 19:40:27 +0000 Message-ID: References: <20210715150817.51485-1-shirik@nvidia.com> <20210715164126.54073-1-shirik@nvidia.com> <20210715164126.54073-4-shirik@nvidia.com> In-Reply-To: <20210715164126.54073-4-shirik@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nvidia.com; dkim=none (message not signed) header.d=none;nvidia.com; dmarc=none action=none header.from=marvell.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: d1ab7b6a-c859-407f-46ba-08d94891903d x-ms-traffictypediagnostic: CO6PR18MB4483: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8273; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR18MB4484.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d1ab7b6a-c859-407f-46ba-08d94891903d X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Jul 2021 19:40:27.6540 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pJLRaOVajEVTWD+XuERNSz+OMwod5hebgCHWFlOadAQ5QHYaQBBW/k4KEVKmV1dzRgDVBGstl1rr1W+zr8Gb/A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR18MB4483 X-Proofpoint-ORIG-GUID: 8NllIib3GuNFjN8LDFngPURYu7rYCDXp X-Proofpoint-GUID: 8NllIib3GuNFjN8LDFngPURYu7rYCDXp X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-16_09:2021-07-16, 2021-07-16 signatures=0 Subject: Re: [dpdk-dev] [EXT] [PATCH v8 03/16] crypto/mlx5: add session operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > Sessions are used in symmetric transformations in order to prepare > objects and data for packet processing stage. >=20 > A mlx5 session includes iv_offset, pointer to mlx5_crypto_dek struct, > bsf_size, bsf_p_type, block size index, encryption_order and encryption > standard. >=20 > Implement the next session operations: > mlx5_crypto_sym_session_get_size- returns the size of the mlx5 > session struct. > mlx5_crypto_sym_session_configure- prepares the DEK hash-list > and saves all the session data. > mlx5_crypto_sym_session_clear - destroys the DEK hash-list. >=20 > Signed-off-by: Shiri Kuzin > Acked-by: Matan Azrad > --- > doc/guides/cryptodevs/features/mlx5.ini | 5 + > doc/guides/cryptodevs/mlx5.rst | 10 ++ > drivers/crypto/mlx5/mlx5_crypto.c | 172 +++++++++++++++++++++++- > 3 files changed, 182 insertions(+), 5 deletions(-) >=20 > diff --git a/doc/guides/cryptodevs/features/mlx5.ini > b/doc/guides/cryptodevs/features/mlx5.ini > index ceadd967b6..bd757b5211 100644 > --- a/doc/guides/cryptodevs/features/mlx5.ini > +++ b/doc/guides/cryptodevs/features/mlx5.ini > @@ -4,12 +4,17 @@ > ; Refer to default.ini for the full list of available PMD features. > ; > [Features] > +Symmetric crypto =3D Y > HW Accelerated =3D Y > +Cipher multiple data units =3D Y > +Cipher wrapped key =3D Y >=20 > ; > ; Supported crypto algorithms of a mlx5 crypto driver. > ; > [Cipher] > +AES XTS (128) =3D Y > +AES XTS (256) =3D Y >=20 > ; > ; Supported authentication algorithms of a mlx5 crypto driver. > diff --git a/doc/guides/cryptodevs/mlx5.rst > b/doc/guides/cryptodevs/mlx5.rst > index 05a0a449e2..dd1d1a615d 100644 > --- a/doc/guides/cryptodevs/mlx5.rst > +++ b/doc/guides/cryptodevs/mlx5.rst > @@ -53,6 +53,16 @@ Supported NICs >=20 > * Mellanox\ |reg| ConnectX\ |reg|-6 200G MCX654106A-HCAT (2x200G) >=20 > + > +Limitations > +----------- > + > +- AES-XTS keys provided in xform must include keytag and should be > wrappend. wrapped > +- The supported data-unit lengths are 512B and 1KB. In case the > `dataunit_len` > + is not provided in the cipher xform, the OP length is limited to the a= bove > + values and 1MB. > + > + > Prerequisites > ------------- >=20 > diff --git a/drivers/crypto/mlx5/mlx5_crypto.c > b/drivers/crypto/mlx5/mlx5_crypto.c > index d2d82c7b15..3f0c97d081 100644 > --- a/drivers/crypto/mlx5/mlx5_crypto.c > +++ b/drivers/crypto/mlx5/mlx5_crypto.c > @@ -3,6 +3,7 @@ > */ >=20 > #include > +#include > #include > #include > #include > @@ -20,7 +21,9 @@ > #define MLX5_CRYPTO_LOG_NAME pmd.crypto.mlx5 >=20 > #define MLX5_CRYPTO_FEATURE_FLAGS \ > - RTE_CRYPTODEV_FF_HW_ACCELERATED > + (RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | > RTE_CRYPTODEV_FF_HW_ACCELERATED | \ > + RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY | \ > + RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS) >=20 > TAILQ_HEAD(mlx5_crypto_privs, mlx5_crypto_priv) mlx5_crypto_priv_list = =3D >=20 > TAILQ_HEAD_INITIALIZER(mlx5_crypto_priv_list); > @@ -30,6 +33,32 @@ int mlx5_crypto_logtype; >=20 > uint8_t mlx5_crypto_driver_id; >=20 > +const struct rte_cryptodev_capabilities mlx5_crypto_caps[] =3D { > + { /* AES XTS */ > + .op =3D RTE_CRYPTO_OP_TYPE_SYMMETRIC, > + {.sym =3D { > + .xform_type =3D RTE_CRYPTO_SYM_XFORM_CIPHER, > + {.cipher =3D { > + .algo =3D RTE_CRYPTO_CIPHER_AES_XTS, > + .block_size =3D 16, > + .key_size =3D { > + .min =3D 32, > + .max =3D 64, > + .increment =3D 32 > + }, > + .iv_size =3D { > + .min =3D 16, > + .max =3D 16, > + .increment =3D 0 > + }, > + .dataunit_set =3D > + > RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES | > + > RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES, > + }, } > + }, } > + }, > +}; > + > static const char mlx5_crypto_drv_name[] =3D > RTE_STR(MLX5_CRYPTO_DRIVER_NAME); >=20 > static const struct rte_driver mlx5_drv =3D { > @@ -39,6 +68,49 @@ static const struct rte_driver mlx5_drv =3D { >=20 > static struct cryptodev_driver mlx5_cryptodev_driver; >=20 > +struct mlx5_crypto_session { > + uint32_t bs_bpt_eo_es; > + /* > + * bsf_size, bsf_p_type, encryption_order and encryption standard, > + * saved in big endian format. > + */ Normally the comments are added before the variable. Or add /**< for post comment. > + uint32_t bsp_res; > + /* > + * crypto_block_size_pointer and reserved 24 bits saved in big endian > + * format. > + */ > + uint32_t iv_offset:16; > + /* Starting point for Initialisation Vector. */ > + struct mlx5_crypto_dek *dek; /* Pointer to dek struct. */ > + uint32_t dek_id; /* DEK ID */ > +} __rte_packed; > + > +static void > +mlx5_crypto_dev_infos_get(struct rte_cryptodev *dev, > + struct rte_cryptodev_info *dev_info) > +{ > + RTE_SET_USED(dev); > + if (dev_info !=3D NULL) { > + dev_info->driver_id =3D mlx5_crypto_driver_id; > + dev_info->feature_flags =3D MLX5_CRYPTO_FEATURE_FLAGS; > + dev_info->capabilities =3D mlx5_crypto_caps; > + dev_info->max_nb_queue_pairs =3D 0; > + dev_info->min_mbuf_headroom_req =3D 0; > + dev_info->min_mbuf_tailroom_req =3D 0; > + dev_info->sym.max_nb_sessions =3D 0; > + /* > + * If 0, the device does not have any limitation in number of > + * sessions that can be used. > + */ > + } > +} > + > +static unsigned int > +mlx5_crypto_sym_session_get_size(struct rte_cryptodev *dev > __rte_unused) > +{ > + return sizeof(struct mlx5_crypto_session); > +} > + > static int > mlx5_crypto_dev_configure(struct rte_cryptodev *dev, > struct rte_cryptodev_config *config __rte_unused) > @@ -61,19 +133,109 @@ mlx5_crypto_dev_close(struct rte_cryptodev *dev) > return 0; > } >=20 > +static int > +mlx5_crypto_sym_session_configure(struct rte_cryptodev *dev, > + struct rte_crypto_sym_xform *xform, > + struct rte_cryptodev_sym_session *session, > + struct rte_mempool *mp) > +{ > + struct mlx5_crypto_priv *priv =3D dev->data->dev_private; > + struct mlx5_crypto_session *sess_private_data; > + struct rte_crypto_cipher_xform *cipher; > + uint8_t encryption_order; > + int ret; > + > + if (unlikely(xform->next !=3D NULL)) { > + DRV_LOG(ERR, "Xform next is not supported."); > + return -ENOTSUP; > + } > + if (unlikely((xform->type !=3D RTE_CRYPTO_SYM_XFORM_CIPHER) || > + (xform->cipher.algo !=3D RTE_CRYPTO_CIPHER_AES_XTS))) { > + DRV_LOG(ERR, "Only AES-XTS algorithm is supported."); > + return -ENOTSUP; > + } > + ret =3D rte_mempool_get(mp, (void *)&sess_private_data); > + if (ret !=3D 0) { > + DRV_LOG(ERR, > + "Failed to get session %p private data from > mempool.", > + sess_private_data); > + return -ENOMEM; > + } > + cipher =3D &xform->cipher; > + sess_private_data->dek =3D mlx5_crypto_dek_prepare(priv, cipher); > + if (sess_private_data->dek =3D=3D NULL) { > + rte_mempool_put(mp, sess_private_data); > + DRV_LOG(ERR, "Failed to prepare dek."); > + return -ENOMEM; > + } > + if (cipher->op =3D=3D RTE_CRYPTO_CIPHER_OP_ENCRYPT) > + encryption_order =3D > MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_MEMORY; > + else > + encryption_order =3D > MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_WIRE; > + sess_private_data->bs_bpt_eo_es =3D rte_cpu_to_be_32 > + (MLX5_BSF_SIZE_64B << MLX5_BSF_SIZE_OFFSET | > + MLX5_BSF_P_TYPE_CRYPTO << > MLX5_BSF_P_TYPE_OFFSET | > + encryption_order << > MLX5_ENCRYPTION_ORDER_OFFSET | > + MLX5_ENCRYPTION_STANDARD_AES_XTS); > + switch (xform->cipher.dataunit_len) { > + case 0: > + sess_private_data->bsp_res =3D 0; > + break; > + case 512: > + sess_private_data->bsp_res =3D rte_cpu_to_be_32 > + > ((uint32_t)MLX5_BLOCK_SIZE_512B << > + MLX5_BLOCK_SIZE_OFFSET); > + break; > + case 4096: > + sess_private_data->bsp_res =3D rte_cpu_to_be_32 > + > ((uint32_t)MLX5_BLOCK_SIZE_4096B << > + MLX5_BLOCK_SIZE_OFFSET); > + break; > + default: > + DRV_LOG(ERR, "Cipher data unit length is not supported."); > + return -ENOTSUP; > + } > + sess_private_data->iv_offset =3D cipher->iv.offset; > + sess_private_data->dek_id =3D > + rte_cpu_to_be_32(sess_private_data->dek->obj->id > & > + 0xffffff); > + set_sym_session_private_data(session, dev->driver_id, > + sess_private_data); > + DRV_LOG(DEBUG, "Session %p was configured.", sess_private_data); > + return 0; > +} > + > +static void > +mlx5_crypto_sym_session_clear(struct rte_cryptodev *dev, > + struct rte_cryptodev_sym_session *sess) > +{ > + struct mlx5_crypto_priv *priv =3D dev->data->dev_private; > + struct mlx5_crypto_session *spriv =3D > get_sym_session_private_data(sess, > + dev- > >driver_id); > + > + if (unlikely(spriv =3D=3D NULL)) { > + DRV_LOG(ERR, "Failed to get session %p private data.", > spriv); > + return; > + } > + mlx5_crypto_dek_destroy(priv, spriv->dek); > + set_sym_session_private_data(sess, dev->driver_id, NULL); > + rte_mempool_put(rte_mempool_from_obj(spriv), spriv); > + DRV_LOG(DEBUG, "Session %p was cleared.", spriv); > +} > + > static struct rte_cryptodev_ops mlx5_crypto_ops =3D { > .dev_configure =3D mlx5_crypto_dev_configure, > .dev_start =3D NULL, > .dev_stop =3D NULL, > .dev_close =3D mlx5_crypto_dev_close, > - .dev_infos_get =3D NULL, > + .dev_infos_get =3D mlx5_crypto_dev_infos_get, > .stats_get =3D NULL, > .stats_reset =3D NULL, > .queue_pair_setup =3D NULL, > .queue_pair_release =3D NULL, > - .sym_session_get_size =3D NULL, > - .sym_session_configure =3D NULL, > - .sym_session_clear =3D NULL, > + .sym_session_get_size =3D mlx5_crypto_sym_session_get_size, > + .sym_session_configure =3D > mlx5_crypto_sym_session_configure, > + .sym_session_clear =3D mlx5_crypto_sym_session_clear, > .sym_get_raw_dp_ctx_size =3D NULL, > .sym_configure_raw_dp_ctx =3D NULL, > }; > -- > 2.27.0