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Mon, 6 Sep 2021 18:58:33 +0000 From: Akhil Goyal To: Nithin Kumar Dabilpuram , "dev@dpdk.org" , "olivier.matz@6wind.com" , "konstantin.ananyev@intel.com" CC: Jerin Jacob Kollanukkaran , "hemant.agrawal@nxp.com" , "thomas@monjalon.net" , "g.singh@nxp.com" , "ferruh.yigit@intel.com" , "roy.fan.zhang@intel.com" , "declan.doherty@intel.com" , "radu.nicolau@intel.com" , "jiawenwu@trustnetic.com" , Nithin Kumar Dabilpuram Thread-Topic: [PATCH v4 1/4] security: enforce semantics for Tx inline processing Thread-Index: AQHXj3Y4UyM0kl3PTE2brwIS7XyQHquXg0qQ Date: Mon, 6 Sep 2021 18:58:33 +0000 Message-ID: References: <20210624102848.3878788-1-gakhil@marvell.com> <20210812123257.19595-1-ndabilpuram@marvell.com> <20210812123257.19595-2-ndabilpuram@marvell.com> In-Reply-To: <20210812123257.19595-2-ndabilpuram@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6b25a3d9-88b7-4f83-a03e-08d97168532c x-ms-traffictypediagnostic: CO1PR18MB4665: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5516; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR18MB4484.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6b25a3d9-88b7-4f83-a03e-08d97168532c X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2021 18:58:33.4133 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mmto5btl/0qhXHTG8HSugBaaFy5MsW/KWPLSYll1p+ZEkdBu4hQI1WJnOLgN2lglH1Q12x5KKU1nCVm8Ee/d8w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO1PR18MB4665 X-Proofpoint-GUID: f7UEi7S4IbmeKt-XVJ1lqU1-ARj3HcCo X-Proofpoint-ORIG-GUID: f7UEi7S4IbmeKt-XVJ1lqU1-ARj3HcCo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-06_08,2021-09-03_01,2020-04-07_01 Subject: Re: [dpdk-dev] [PATCH v4 1/4] security: enforce semantics for Tx inline processing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > Not all net PMD's/HW can parse packet and identify L2 header and > L3 header locations on Tx. This is inline with other Tx offloads > requirements such as L3 checksum, L4 checksum offload, etc, > where mbuf.l2_len, mbuf.l3_len etc, needs to be set for HW to be > able to generate checksum. Since Inline IPSec is also such a Tx > offload, some PMD's at least need mbuf.l2_len to be valid to > find L3 header and perform Outbound IPSec processing. >=20 > Hence, this patch updates documentation to enforce setting > mbuf.l2_len while setting PKT_TX_SEC_OFFLOAD in mbuf.ol_flags > for Inline IPSec Crypto / Protocol offload processing to > work on Tx. >=20 > Signed-off-by: Nithin Dabilpuram Acked-by: Akhil Goyal