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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 2526ed48-2372-4cab-10de-08d70cdfc3db X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Jul 2019 06:59:09.7389 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pbhagavatula@marvell.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1801MB1991 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-20_04:2019-07-19,2019-07-20 signatures=0 Subject: Re: [dpdk-dev] [RFC v2 4/5] spinlock: use wfe to reduce contention on aarch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >-----Original Message----- >From: dev On Behalf Of Gavin Hu >Sent: Wednesday, July 3, 2019 2:29 PM >To: dev@dpdk.org >Cc: nd@arm.com >Subject: [dpdk-dev] [RFC v2 4/5] spinlock: use wfe to reduce contention >on aarch64 > >In acquiring a spinlock, cores repeatedly poll the lock variable. >This is replaced by rte_wait_until_equal API. > >5~10% performance gain was measured by running spinlock_autotest >on >14 isolated cores of ThunderX2. Tested on octeontx2 board. > >Signed-off-by: Gavin Hu >Reviewed-by: Ruifeng Wang >Reviewed-by: Phil Yang >Reviewed-by: Steve Capper >Reviewed-by: Ola Liljedahl >Reviewed-by: Honnappa Nagarahalli Tested-by: Pavan Nikhilesh >--- > .../common/include/arch/arm/rte_spinlock.h | 25 >++++++++++++++++++++++ > .../common/include/generic/rte_spinlock.h | 2 +- > 2 files changed, 26 insertions(+), 1 deletion(-) > >diff --git a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h >b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h >index 1a6916b..f25d17f 100644 >--- a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h >+++ b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h >@@ -16,6 +16,31 @@ extern "C" { > #include > #include "generic/rte_spinlock.h" > >+/* armv7a does support WFE, but an explicit wake-up signal using SEV >is >+ * required (must be preceded by DSB to drain the store buffer) and >+ * this is less performant, so keep armv7a implementation unchanged. >+ */ >+#if defined(RTE_USE_WFE) && defined(RTE_ARCH_ARM64) >+static inline void >+rte_spinlock_lock(rte_spinlock_t *sl) >+{ >+ unsigned int tmp; >+ /* >http://infocenter.arm.com/help/index.jsp?topic=3D/com.arm.doc. >+ * faqs/ka16809.html >+ */ >+ asm volatile( >+ "sevl\n" >+ "1: wfe\n" >+ "2: ldaxr %w[tmp], %w[locked]\n" >+ "cbnz %w[tmp], 1b\n" >+ "stxr %w[tmp], %w[one], %w[locked]\n" >+ "cbnz %w[tmp], 2b\n" >+ : [tmp] "=3D&r" (tmp), [locked] "+Q"(sl->locked) >+ : [one] "r" (1) >+ : "cc", "memory"); >+} >+#endif >+ > static inline int rte_tm_supported(void) > { > return 0; >diff --git a/lib/librte_eal/common/include/generic/rte_spinlock.h >b/lib/librte_eal/common/include/generic/rte_spinlock.h >index 87ae7a4..cf4f15b 100644 >--- a/lib/librte_eal/common/include/generic/rte_spinlock.h >+++ b/lib/librte_eal/common/include/generic/rte_spinlock.h >@@ -57,7 +57,7 @@ rte_spinlock_init(rte_spinlock_t *sl) > static inline void > rte_spinlock_lock(rte_spinlock_t *sl); > >-#ifdef RTE_FORCE_INTRINSICS >+#if defined(RTE_FORCE_INTRINSICS) && !defined(RTE_USE_WFE) > static inline void > rte_spinlock_lock(rte_spinlock_t *sl) > { >-- >2.7.4