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Sun, 14 Apr 2019 14:40:30 +0000 Received: from CY4PR1801MB1863.namprd18.prod.outlook.com ([fe80::e980:fa09:c83a:851d]) by CY4PR1801MB1863.namprd18.prod.outlook.com ([fe80::e980:fa09:c83a:851d%3]) with mapi id 15.20.1792.018; Sun, 14 Apr 2019 14:40:30 +0000 From: Pavan Nikhilesh Bhagavatula To: Thomas Monjalon , Jerin Jacob Kollanukkaran CC: "dev@dpdk.org" , "jerinjacobk@gmail.com" , "yskoh@mellanox.com" , "bruce.richardson@intel.com" Thread-Topic: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags Thread-Index: AQHU8L+J7cUhAjPJBUqp2JiLniqos6Y4HKEAgAAZ84CAAWsIgIAA79AAgAEsVUA= Date: Sun, 14 Apr 2019 14:40:30 +0000 Message-ID: References: <20190406142737.20091-1-jerinj@marvell.com> <1848175.uIgEXrQmFj@xps> <3120421.JkTWNKALu9@xps> In-Reply-To: <3120421.JkTWNKALu9@xps> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [122.172.57.155] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: cb089224-30a0-4fed-d321-08d6c0e7249a x-microsoft-antispam: BCL:0; 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LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: kJVfZI9vOtjl/oq0FX0b5pXrt4Y5fZs4oolaZZjh/5D2ZI0mTGQkDj5I0kkO0KvmiPTwT6+7lrEJoHUk/Vr5rqrqrGFrZ/FtrsiJ7pCFR5T387ShhBaX1R08Q0zj0DA8Mc564+/dJT+R4GKb2AgQ6/w+k8pWJU9rIcgng/6n3Up1AGiVwDU21iesxGPYYSq+m6P7c3/PiUN7gkBvX1hvkRt7+3qCEQ3kphWj4MOOtXiFoCdRBTvarl9msXWNfSvsgMSK+/qUHyUb9DKEQuhgIs5Q1jAkXgHHb+pzwO9B0MnXyBZ9AmIdMKKNPqs1aJA4P6rrNKPySHyRbaui01Kaod1AcZ7IyEhK9QbupyuEbZoFJooNhUEsgKsVIUAYTLwhSYuBxn57eWB9XZC2l2ehdBADECTfJFTWFN28Y843TQ8= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: cb089224-30a0-4fed-d321-08d6c0e7249a X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Apr 2019 14:40:30.2347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1801MB1990 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-14_03:, , signatures=0 Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Apr 2019 14:40:34 -0000 Hi Thomas,=20 There is no guarantee of primary part number (machine names) uniqueness bet= ween implementors.=20 If we limit lookups to only machine names through primary part number we wo= uld have a lot of repetitive defines. Also, moving the arrays into the python script is not feasible as meson nee= ds to reparse the standard out from the python script Currently, config is split into three parts : 1. Implementor specific defines. 2. Micro-arch specific compiler flags. 3. Micro-arch specific defines. I think from a configurability point of view the above three are really imp= ortant for fine grained control. Thoughts? Regards, Pavan. >-----Original Message----- >From: Thomas Monjalon >Sent: Sunday, April 14, 2019 2:13 AM >To: Jerin Jacob Kollanukkaran >Cc: Pavan Nikhilesh Bhagavatula ; >dev@dpdk.org; jerinjacobk@gmail.com; yskoh@mellanox.com; >bruce.richardson@intel.com >Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine >specific flags > >13/04/2019 08:24, Jerin Jacob Kollanukkaran: >> > I was not confortable with this patch without being able to say why. >> > Yesterday I spent more time to understand and see what may be improved= . >> > I agree it is late, so it won't block this patch for 19.05. >> > Do you agree this file can be improved? >> >> Moving to the all to static config file is an option but we lose the >> flexibility of runtime detecting the options and few of them are >> probing at runtime based on gcc versions and mcpu combination etc. > >I think there is a misunderstanding. >I'm suggesting to symplify arrays by indexing only by machine name. >It should not change the behaviour. > >> I am not expert in meson area and not sure meson/python has better >> data strcture for this other than list/array combo. If Bruce has any >> feedback on this, then we will try to prototype it. >> >> > Please would you like to look at reworking during next cycle? >> > Thanks > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 0DBD9A00E6 for ; Sun, 14 Apr 2019 16:40:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 709745689; Sun, 14 Apr 2019 16:40:35 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 5591A4F9C for ; Sun, 14 Apr 2019 16:40:34 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3EEeJme010834; Sun, 14 Apr 2019 07:40:33 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : references : in-reply-to : content-type : content-transfer-encoding : mime-version; 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a=rsa-sha256; c=relaxed/relaxed; d=marvell.onmicrosoft.com; s=selector1-marvell-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=jd1WWuqB5N80VLDCdZwjO660wyZF0s+e917rnhwYFk8=; b=nkxT8kl5qsKcGyKJtnSVjsIzole4100ugHEJi1GIBc1sttBAYe4rDiyR/646ZBM/Hinm1cO7Dm08Va9xkYVApNdy2yvSb28GuXd3Aoajc3OfRxlB6rj/le0o8CtIS4Zm+WDQGrWra9/TMGvoEegWMikVJ9BMRi9j+eATu1JNOQo= Received: from CY4PR1801MB1863.namprd18.prod.outlook.com (10.171.255.14) by CY4PR1801MB1990.namprd18.prod.outlook.com (10.171.255.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1792.17; Sun, 14 Apr 2019 14:40:30 +0000 Received: from CY4PR1801MB1863.namprd18.prod.outlook.com ([fe80::e980:fa09:c83a:851d]) by CY4PR1801MB1863.namprd18.prod.outlook.com ([fe80::e980:fa09:c83a:851d%3]) with mapi id 15.20.1792.018; Sun, 14 Apr 2019 14:40:30 +0000 From: Pavan Nikhilesh Bhagavatula To: Thomas Monjalon , Jerin Jacob Kollanukkaran CC: "dev@dpdk.org" , "jerinjacobk@gmail.com" , "yskoh@mellanox.com" , "bruce.richardson@intel.com" Thread-Topic: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags Thread-Index: AQHU8L+J7cUhAjPJBUqp2JiLniqos6Y4HKEAgAAZ84CAAWsIgIAA79AAgAEsVUA= Date: Sun, 14 Apr 2019 14:40:30 +0000 Message-ID: References: <20190406142737.20091-1-jerinj@marvell.com> <1848175.uIgEXrQmFj@xps> <3120421.JkTWNKALu9@xps> In-Reply-To: <3120421.JkTWNKALu9@xps> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [122.172.57.155] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: cb089224-30a0-4fed-d321-08d6c0e7249a x-microsoft-antispam: BCL:0; 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LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: kJVfZI9vOtjl/oq0FX0b5pXrt4Y5fZs4oolaZZjh/5D2ZI0mTGQkDj5I0kkO0KvmiPTwT6+7lrEJoHUk/Vr5rqrqrGFrZ/FtrsiJ7pCFR5T387ShhBaX1R08Q0zj0DA8Mc564+/dJT+R4GKb2AgQ6/w+k8pWJU9rIcgng/6n3Up1AGiVwDU21iesxGPYYSq+m6P7c3/PiUN7gkBvX1hvkRt7+3qCEQ3kphWj4MOOtXiFoCdRBTvarl9msXWNfSvsgMSK+/qUHyUb9DKEQuhgIs5Q1jAkXgHHb+pzwO9B0MnXyBZ9AmIdMKKNPqs1aJA4P6rrNKPySHyRbaui01Kaod1AcZ7IyEhK9QbupyuEbZoFJooNhUEsgKsVIUAYTLwhSYuBxn57eWB9XZC2l2ehdBADECTfJFTWFN28Y843TQ8= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: cb089224-30a0-4fed-d321-08d6c0e7249a X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Apr 2019 14:40:30.2347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1801MB1990 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-14_03:, , signatures=0 Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190414144030.KV1iocV7NnL7q63DAJOdh_WGUFdqOAmW07w1BL0SYww@z> Hi Thomas,=20 There is no guarantee of primary part number (machine names) uniqueness bet= ween implementors.=20 If we limit lookups to only machine names through primary part number we wo= uld have a lot of repetitive defines. Also, moving the arrays into the python script is not feasible as meson nee= ds to reparse the standard out from the python script Currently, config is split into three parts : 1. Implementor specific defines. 2. Micro-arch specific compiler flags. 3. Micro-arch specific defines. I think from a configurability point of view the above three are really imp= ortant for fine grained control. Thoughts? Regards, Pavan. >-----Original Message----- >From: Thomas Monjalon >Sent: Sunday, April 14, 2019 2:13 AM >To: Jerin Jacob Kollanukkaran >Cc: Pavan Nikhilesh Bhagavatula ; >dev@dpdk.org; jerinjacobk@gmail.com; yskoh@mellanox.com; >bruce.richardson@intel.com >Subject: Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine >specific flags > >13/04/2019 08:24, Jerin Jacob Kollanukkaran: >> > I was not confortable with this patch without being able to say why. >> > Yesterday I spent more time to understand and see what may be improved= . >> > I agree it is late, so it won't block this patch for 19.05. >> > Do you agree this file can be improved? >> >> Moving to the all to static config file is an option but we lose the >> flexibility of runtime detecting the options and few of them are >> probing at runtime based on gcc versions and mcpu combination etc. > >I think there is a misunderstanding. >I'm suggesting to symplify arrays by indexing only by machine name. >It should not change the behaviour. > >> I am not expert in meson area and not sure meson/python has better >> data strcture for this other than list/array combo. If Bruce has any >> feedback on this, then we will try to prototype it. >> >> > Please would you like to look at reworking during next cycle? >> > Thanks > >