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Mon, 16 Oct 2017 22:49:55 +0000 From: "Patil, Harish" To: Gregory Etelson , Ferruh Yigit CC: "Thotton, Shijith" , "Wu, Jingjing" , "Tan, Jianfeng" , "Xing, Beilei" , "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [PATCH v2 2/2] igb_uio: fix interrupt enablement after FLR in VM Thread-Index: AQHTRWM7xlYYFUaMGkin+8hclG/pwaLmogeA Date: Mon, 16 Oct 2017 22:49:54 +0000 Message-ID: References: <1507581083-33667-2-git-send-email-jingjing.wu@intel.com> <1507586960-35508-1-git-send-email-jingjing.wu@intel.com> <9BB6961774997848B5B42BEC655768F810E92434@SHSMSX103.ccr.corp.intel.com> <20171013081205.GA20678@localhost.localdomain> <8d9e803d-8fbe-c0e2-81d2-62c30a1738a9@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Harish.Patil@cavium.com; x-originating-ip: [173.186.134.106] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; MWHPR07MB3069; 6:Si2ArAV/H07gvxS65KBW49eH7Jd4oAwdBUp9pZ3aufSXlQ+A+DXZ/OhMW+SMprgPTfJkJ1bnwIQZ9+0XdBjnsREVeusu+7XEjlImtmHeZ2m6D2E3ve/ye6x4JUYE+IrcfygZ47inPVDLsff/gNBP6WfYWGyMIrubBlNg+uUJwqhEHcfrHGgAbp+4CNBnewxjkRiYJUZv3LRWSIYq7JnlEF6+2jMdjMI+4TEFe79LRgk5lGqREKZVN4N+RrBqAvGoRx/L7O7knrcZE4i8/+wVz3iCr/uaXabkveFztT3ZEhjka3iECWBLJVuUZufrGR/tjjA4YvTQYMp36WPu/VIbow==; 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SRVR:MWHPR07MB3069; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:MWHPR07MB3069; x-forefront-prvs: 0462918D61 received-spf: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Oct 2017 22:49:54.9123 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR07MB3069 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH v2 2/2] igb_uio: fix interrupt enablement after FLR in VM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 16 Oct 2017 22:49:58 -0000 RnJvbTogR3JlZ29yeSBFdGVsc29uIDxncmVnb3J5QHdla2EuaW88bWFpbHRvOmdyZWdvcnlAd2Vr YS5pbz4+DQpEYXRlOiBTYXR1cmRheSwgT2N0b2JlciAxNCwgMjAxNyBhdCA4OjEwIFBNDQpUbzog RmVycnVoIFlpZ2l0IDxmZXJydWgueWlnaXRAaW50ZWwuY29tPG1haWx0bzpmZXJydWgueWlnaXRA aW50ZWwuY29tPj4NCkNjOiAiVGhvdHRvbiwgU2hpaml0aCIgPFNoaWppdGguVGhvdHRvbkBjYXZp dW0uY29tPG1haWx0bzpTaGlqaXRoLlRob3R0b25AY2F2aXVtLmNvbT4+LCAiV3UsIEppbmdqaW5n IiA8amluZ2ppbmcud3VAaW50ZWwuY29tPG1haWx0bzpqaW5namluZy53dUBpbnRlbC5jb20+Piwg SGFyaXNoIFBhdGlsIDxIYXJpc2guUGF0aWxAY2F2aXVtLmNvbTxtYWlsdG86SGFyaXNoLlBhdGls QGNhdml1bS5jb20+PiwgIlRhbiwgSmlhbmZlbmciIDxqaWFuZmVuZy50YW5AaW50ZWwuY29tPG1h aWx0bzpqaWFuZmVuZy50YW5AaW50ZWwuY29tPj4sICJYaW5nLCBCZWlsZWkiIDxiZWlsZWkueGlu Z0BpbnRlbC5jb208bWFpbHRvOmJlaWxlaS54aW5nQGludGVsLmNvbT4+LCAiZGV2QGRwZGsub3Jn PG1haWx0bzpkZXZAZHBkay5vcmc+IiA8ZGV2QGRwZGsub3JnPG1haWx0bzpkZXZAZHBkay5vcmc+ PiwgInN0YWJsZUBkcGRrLm9yZzxtYWlsdG86c3RhYmxlQGRwZGsub3JnPiIgPHN0YWJsZUBkcGRr Lm9yZzxtYWlsdG86c3RhYmxlQGRwZGsub3JnPj4NClN1YmplY3Q6IFJlOiBbUEFUQ0ggdjIgMi8y XSBpZ2JfdWlvOiBmaXggaW50ZXJydXB0IGVuYWJsZW1lbnQgYWZ0ZXIgRkxSIGluIFZNDQoNCkkn bGwgc3RhcnQgdG8gYnVpbGQgc2V0dXAgZW52aXJvbm1lbnQgdGhpcyB3ZWVrLg0KUmVnYXJkcywN CkdyZWdvcnkNCg0KT24gU2F0LCBPY3QgMTQsIDIwMTcgYXQgMTI6MTEgQU0sIEZlcnJ1aCBZaWdp dCA8ZmVycnVoLnlpZ2l0QGludGVsLmNvbTxtYWlsdG86ZmVycnVoLnlpZ2l0QGludGVsLmNvbT4+ IHdyb3RlOg0KT24gMTAvMTMvMjAxNyA5OjEyIEFNLCBTaGlqaXRoIFRob3R0b24gd3JvdGU6DQo8 Li4uPg0KDQo+IEhpIEppbmdqaW5nLA0KPg0KPiBUaGlzIHBhdGNoIHBlcmZlY3RseSBtZWV0cyBy ZXF1aXJlbWVudHMgYXMgYm90aCByZXNldHMgYXJlIHJldGFpbmVkDQo+IChvcGVuIGFuZCByZWxl YXNlKS4gVGVzdGVkIGl0IHdpdGggTGlxdWlkSU8gTklDIGFuZCBpdCB3b3JrcyBmaW5lLg0KPiBJ IGNhbiBzZWUgTVNJLVggcmUtZW5hYmxlZCBvbiBlYWNoIHJ1biB3aXRoIG5ldyBwYXRjaC4NCj4N Cj4gR3JlZ29yeSwgSGFyaXNoLA0KPiBQbGVhc2UgdmVyaWZ5IHRoZSBwYXRjaCBvbiB5b3VyIHNl dHVwIGlmIHBvc3NpYmxlLg0KDQpIaSBHcmVnb3J5LCBIYXJpc2gsDQoNCkRpZCB5b3UgYWJsZSB0 byB0ZXN0IHRoaXMgcGF0Y2g/DQoNClRoYW5rcywNCmZlcnJ1aA0KDQo+DQo+IFRoYW5rcywNCj4g U2hpaml0aA0KPg0KDQoNCkhpIGFsbCwNCkl0cyBub3Qgd29ya2luZyBmb3IgcWVkZSBWRiBkZXZp Y2UuDQpTbyByZXF1ZXN0IHRvIGJhY2sgb3V0IGFsbCBpZ2JfdWlvIGNoYW5nZXMgcmVsYXRlZCB0 byB0aGUgcGF0Y2g6DQppZ2JfdWlvOiBpc3N1ZSBGTFIgZHVyaW5nIG9wZW4gYW5kIHJlbGVhc2Ug b2YgZGV2aWNlIGZpbGUNCg0KVGhhbmtzLA0KSGFyaXNoDQoNCg==