Re: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest should be stored at a DMAeble address

[Akhil Goyal <akhil.goyal@nxp.com>]

Hi Arek,

Ok. I would rebase the patch.
Regarding changes required to qat_snow3g, I do not have setup to test on qat and the hardware that I test, currently snow3g support is not added. I can send the patches for snow3g at some later stage.

Regards,
Akhil

-----Original Message-----
From: Kusztal, ArkadiuszX [mailto:arkadiuszx.kusztal@intel.com] 
Sent: Wednesday, October 05, 2016 2:57 PM
To: Akhil Goyal <akhil.goyal@nxp.com>; dev@dpdk.org; Doherty, Declan <declan.doherty@intel.com>
Cc: Jain, Deepak K <deepak.k.jain@intel.com>; Trahe, Fiona <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
Subject: RE: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest should be stored at a DMAeble address

Hi Akhil,

Could you rebase it against newest next-crypto subtree, there were changes with function names in the meantime.
And to make it really consistent across all hw tests could you add this change to qat_snow3g too, for snow3g I assume aad need to obtain correct physical address too.

Regards,
Arek

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Akhil Goyal
> Sent: Wednesday, October 05, 2016 7:40 AM
> To: dev@dpdk.org; Doherty, Declan <declan.doherty@intel.com>
> Subject: Re: [dpdk-dev] [PATCH] test_cryptodev_perf: IV and digest 
> should be stored at a DMAeble address
> 
> On 9/26/2016 10:03 PM, akhil.goyal@nxp.com wrote:
> > From: Akhil Goyal <akhil.goyal@nxp.com>
> >
> > For physical crypto devices, IV and digest are processed by the 
> > crypto device which need the contents to be written on some DMA able address.
> >
> > So in order to do that, IV and digest are accomodated in the packet.
> >
> > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> > ---
> >  app/test/test_cryptodev_perf.c | 10 ++++++++--
> >  1 file changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/app/test/test_cryptodev_perf.c 
> > b/app/test/test_cryptodev_perf.c index 0ea7ec1..930d5b8 100644
> > --- a/app/test/test_cryptodev_perf.c
> > +++ b/app/test/test_cryptodev_perf.c
> > @@ -2366,9 +2366,13 @@ test_perf_set_crypto_op(struct rte_crypto_op
> *op, struct rte_mbuf *m,
> >  	op->sym->auth.aad.length = AES_CBC_CIPHER_IV_LENGTH;
> >
> >  	/* Cipher Parameters */
> > -	op->sym->cipher.iv.data = aes_cbc_iv;
> > +	op->sym->cipher.iv.data = (uint8_t *)m->buf_addr + m->data_off;
> > +	op->sym->cipher.iv.phys_addr = rte_pktmbuf_mtophys(m);
> >  	op->sym->cipher.iv.length = AES_CBC_CIPHER_IV_LENGTH;
> >
> > +	rte_memcpy(op->sym->cipher.iv.data, aes_cbc_iv,
> > +			AES_CBC_CIPHER_IV_LENGTH);
> > +
> >  	/* Data lengths/offsets Parameters */
> >  	op->sym->auth.data.offset = 0;
> >  	op->sym->auth.data.length = data_len; @@ -2468,7 +2472,9 @@ 
> > test_perf_aes_sha(uint8_t dev_id, uint16_t queue_id,
> >  				rte_pktmbuf_free(mbufs[k]);
> >  			return -1;
> >  		}
> > -
> > +		/* Make room for Digest and IV in mbuf */
> > +		rte_pktmbuf_append(mbufs[i], digest_length);
> > +		rte_pktmbuf_prepend(mbufs[i],
> AES_CBC_CIPHER_IV_LENGTH);
> >  	}
> >
> >
> >
> Hi Declan,
> 
> Sorry I missed out copy your name in the TO list. Do we have some 
> comments on this patch.
> 
> Regards,
> Akhil