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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(39860400002)(376002)(346002)(396003)(136003)(46966005)(4326008)(110136005)(54906003)(6506007)(186003)(47076004)(81166007)(5660300002)(82310400003)(8936002)(7696005)(55016002)(26005)(8676002)(9686003)(336012)(478600001)(316002)(86362001)(83380400001)(356005)(33656002)(70206006)(2906002)(70586007)(52536014)(82740400003); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Sep 2020 05:30:13.7135 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 981cd070-84d3-4e6e-0117-08d85093997b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT055.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB5274 Subject: Re: [dpdk-dev] [PATCH v2 02/17] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > Each arch has a define for the default SIMD bitwidth value, this is used = on > EAL init to set the config max SIMD bitwidth. >=20 > Cc: Ruifeng Wang > Cc: Jerin Jacob > Cc: Honnappa Nagarahalli > Cc: David Christensen >=20 > Signed-off-by: Ciara Power >=20 > --- > v2: Changed default bitwidth for Arm to 128. Thanks for this change. Continuing the discussion from V1, for SVE (Scalable Vector Extensions - co= de is vector width agnostic, allowing the same binary to run on multiple pl= atforms with different vector width), I am thinking we should add a default= value which we could use on Arm platforms to identify the choice. I have added some comments in 1/17. > --- > lib/librte_eal/arm/include/rte_vect.h | 2 ++ > lib/librte_eal/common/eal_common_options.c | 3 +++ > lib/librte_eal/include/generic/rte_vect.h | 2 ++ > lib/librte_eal/ppc/include/rte_vect.h | 2 ++ > lib/librte_eal/x86/include/rte_vect.h | 2 ++ > 5 files changed, 11 insertions(+) >=20 > diff --git a/lib/librte_eal/arm/include/rte_vect.h > b/lib/librte_eal/arm/include/rte_vect.h > index 01c51712a1..2cd61d6279 100644 > --- a/lib/librte_eal/arm/include/rte_vect.h > +++ b/lib/librte_eal/arm/include/rte_vect.h > @@ -14,6 +14,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 128 > + > typedef int32x4_t xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/common/eal_common_options.c > b/lib/librte_eal/common/eal_common_options.c > index 90f4e8f5c3..c2a9624f89 100644 > --- a/lib/librte_eal/common/eal_common_options.c > +++ b/lib/librte_eal/common/eal_common_options.c > @@ -35,6 +35,7 @@ > #ifndef RTE_EXEC_ENV_WINDOWS > #include > #endif > +#include >=20 > #include "eal_internal_cfg.h" > #include "eal_options.h" > @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config > *internal_cfg) > internal_cfg->user_mbuf_pool_ops_name =3D NULL; > CPU_ZERO(&internal_cfg->ctrl_cpuset); > internal_cfg->init_complete =3D 0; > + internal_cfg->max_simd_bitwidth.bitwidth =3D > RTE_DEFAULT_SIMD_BITWIDTH; > + internal_cfg->max_simd_bitwidth.locked =3D 0; > } >=20 > static int > diff --git a/lib/librte_eal/include/generic/rte_vect.h > b/lib/librte_eal/include/generic/rte_vect.h > index 3fc47979f8..e98f184a97 100644 > --- a/lib/librte_eal/include/generic/rte_vect.h > +++ b/lib/librte_eal/include/generic/rte_vect.h > @@ -14,6 +14,8 @@ >=20 > #include >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > /* Unsigned vector types */ >=20 > /** > diff --git a/lib/librte_eal/ppc/include/rte_vect.h > b/lib/librte_eal/ppc/include/rte_vect.h > index b0545c878c..70fbd0c423 100644 > --- a/lib/librte_eal/ppc/include/rte_vect.h > +++ b/lib/librte_eal/ppc/include/rte_vect.h > @@ -15,6 +15,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > typedef vector signed int xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/x86/include/rte_vect.h > b/lib/librte_eal/x86/include/rte_vect.h > index df5a607623..b1df75aca7 100644 > --- a/lib/librte_eal/x86/include/rte_vect.h > +++ b/lib/librte_eal/x86/include/rte_vect.h > @@ -35,6 +35,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > typedef __m128i xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > -- > 2.17.1