From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: Diogo Behrens <diogo.behrens@huawei.com>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"david.marchand@redhat.com" <david.marchand@redhat.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
nd <nd@arm.com>, nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH] librte_eal: fix mcslock hang on weak memory
Date: Mon, 23 Nov 2020 18:29:32 +0000 [thread overview]
Message-ID: <DBAPR08MB581416E1D0835A1BBCAB042998FC0@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20200826092002.19395-1-diogo.behrens@huawei.com>
<snip>
>
> The initialization me->locked=1 in lock() must happen before
> next->locked=0 in unlock(), otherwise a thread may hang forever,
> waiting me->locked become 0. On weak memory systems (such as ARMv8),
> the current implementation allows me->locked=1 to be reordered with
> announcing the node (pred->next=me) and, consequently, to be
> reordered with next->locked=0 in unlock().
>
> This fix adds a release barrier to pred->next=me, forcing
> me->locked=1 to happen before this operation.
>
> Signed-off-by: Diogo Behrens <diogo.behrens@huawei.com>
The change looks fine to me. I have tested this on few x86 and Arm machines.
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> ---
> lib/librte_eal/include/generic/rte_mcslock.h | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/lib/librte_eal/include/generic/rte_mcslock.h
> b/lib/librte_eal/include/generic/rte_mcslock.h
> index 2bef28351..ce553f547 100644
> --- a/lib/librte_eal/include/generic/rte_mcslock.h
> +++ b/lib/librte_eal/include/generic/rte_mcslock.h
> @@ -68,7 +68,14 @@ rte_mcslock_lock(rte_mcslock_t **msl, rte_mcslock_t
> *me)
> */
> return;
> }
> - __atomic_store_n(&prev->next, me, __ATOMIC_RELAXED);
> + /* The store to me->next above should also complete before the node is
> + * visible to predecessor thread releasing the lock. Hence, the store
> + * prev->next also requires release semantics. Note that, for example,
> + * on ARM, the release semantics in the exchange operation is not
> + * strong as a release fence and is not sufficient to enforce the
> + * desired order here.
> + */
> + __atomic_store_n(&prev->next, me, __ATOMIC_RELEASE);
>
> /* The while-load of me->locked should not move above the previous
> * store to prev->next. Otherwise it will cause a deadlock. Need a
> --
> 2.28.0
>
next prev parent reply other threads:[~2020-11-23 18:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-26 9:20 Diogo Behrens
2020-08-26 10:17 ` Phil Yang
2020-08-27 8:56 ` Diogo Behrens
2020-08-28 9:19 ` Phil Yang
2020-08-31 18:45 ` Honnappa Nagarahalli
2020-10-06 21:49 ` Thomas Monjalon
2020-10-07 9:55 ` Diogo Behrens
2020-10-20 11:56 ` Thomas Monjalon
2020-10-20 21:49 ` Honnappa Nagarahalli
2020-11-22 18:07 ` Thomas Monjalon
2020-11-23 15:06 ` Honnappa Nagarahalli
2020-11-23 15:44 ` Stephen Hemminger
2020-11-23 18:16 ` Honnappa Nagarahalli
2020-11-23 18:29 ` Honnappa Nagarahalli [this message]
2020-11-23 19:36 ` Stephen Hemminger
2020-11-25 4:50 ` Honnappa Nagarahalli
2020-11-25 8:41 ` Diogo Behrens
2020-11-25 14:16 ` Thomas Monjalon
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