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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(346002)(376002)(136003)(39850400004)(396003)(46966005)(83380400001)(47076004)(70206006)(450100002)(36906005)(81166007)(336012)(82740400003)(8936002)(55016002)(478600001)(52536014)(966005)(26005)(186003)(5660300002)(70586007)(33656002)(6506007)(9686003)(316002)(86362001)(7696005)(82310400003)(54906003)(356005)(2906002)(4326008)(6636002)(110136005)(8676002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2020 17:08:22.7484 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b17185a3-b472-4aa9-396c-08d8872d8fd4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT009.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0802MB2608 Subject: Re: [dpdk-dev] [PATCH v1] eal/arm: fix clang build of native target X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > When doing Clang build with '-mcpu=3Dnative' on N1 platform, build failed > with: > ../lib/librte_eal/arm/include/rte_atomic_64.h:76:39: > error: instruction requires: lse > __ATOMIC128_CAS_OP(__cas_128_release, "caspl") >=20 > This is because native detection for Neoverse N1 was added in Clang-11. > Prior version of Clang's assembler doesn't know LSE support on hardware. > Fixed this for Clang earlier than version 11 by specifying architecture f= or > assembler. > Referred to [1] for this fix. >=20 > Fixes: 7e2c3e17fe2c ("eal/arm64: add 128-bit atomic compare exchange") > Cc: stable@dpdk.org >=20 > [1] > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit= /?i > d=3De0d5896bd356cd577f9710a02d7a474cdf58426b >=20 > Signed-off-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli > --- > lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h > b/lib/librte_eal/arm/include/rte_atomic_64.h > index 2cef88629..7fcd17466 100644 > --- a/lib/librte_eal/arm/include/rte_atomic_64.h > +++ b/lib/librte_eal/arm/include/rte_atomic_64.h > @@ -46,6 +46,8 @@ rte_atomic_thread_fence(int memorder) > /*------------------------ 128 bit atomic operations -------------------= ------*/ >=20 > #if defined(__ARM_FEATURE_ATOMICS) || > defined(RTE_ARM_FEATURE_ATOMICS) > +#define __LSE_PREAMBLE ".arch armv8-a+lse\n" > + > #define __ATOMIC128_CAS_OP(cas_op_name, op_string) = \ > static __rte_noinline rte_int128_t = \ > cas_op_name(rte_int128_t *dst, rte_int128_t old, rte_int128_t updated) > \ > @@ -59,6 +61,7 @@ cas_op_name(rte_int128_t *dst, rte_int128_t old, > rte_int128_t updated) \ > register uint64_t x2 __asm("x2") =3D (uint64_t)updated.val[0]; \ > register uint64_t x3 __asm("x3") =3D (uint64_t)updated.val[1]; \ > asm volatile( \ > + __LSE_PREAMBLE > \ > op_string " %[old0], %[old1], %[upd0], %[upd1], [%[dst]]" \ > : [old0] "+r" (x0), \ > [old1] "+r" (x1) \ > @@ -76,6 +79,7 @@ __ATOMIC128_CAS_OP(__cas_128_acquire, "caspa") > __ATOMIC128_CAS_OP(__cas_128_release, "caspl") > __ATOMIC128_CAS_OP(__cas_128_acq_rel, "caspal") >=20 > +#undef __LSE_PREAMBLE > #undef __ATOMIC128_CAS_OP >=20 > #endif > -- > 2.20.1