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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(39860400002)(346002)(376002)(136003)(396003)(46966005)(2906002)(9686003)(478600001)(8936002)(55016002)(83380400001)(8676002)(6862004)(5660300002)(47076004)(4326008)(316002)(81166007)(52536014)(36906005)(82310400003)(33656002)(186003)(356005)(82740400003)(336012)(53546011)(26005)(6506007)(7696005)(70586007)(54906003)(86362001)(70206006); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2020 17:36:14.9649 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b394ee72-e088-4a7e-4ff1-08d8827a7602 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT019.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB3679 Subject: Re: [dpdk-dev] [PATCH v4 00/58] net: txgbe PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > > +Cc Konstantin and Honnappa for guidance > > > > > > 05/11/2020 09:55, Jiawen Wu: > > > > On Thursday, November 5, 2020 9:55 AM, Jiawen Wu wrote: > > > > > On Thursday, November 5, 2020 1:24 AM, Ferruh Yigit wrote: > > > > > > On 11/3/2020 11:08 PM, Thomas Monjalon wrote: > > > > > > > When pulling in the main branch, I see some checkpatches > > > > > > > warnings (in order of criticality): > > > > > > > Using rte_smp_[r/w]mb > > > > > > > Using rte_panic/rte_exit > > > > > > > Using compiler attribute directly > > > > > > > > > > > > > > Please could you fix them (at least first two) before the > > > > > > > second > series? > > > [...] > > > > > > > > I saw ' rte_smp_*mb ' is in the deprecation notices, but there is > > > > no function can be an alternative. > > > > I would like to use 'rte_atomic_thread_fence(__ATOMIC_ACQUIRE)' to > > > > replace 'rte_smp_rmb()', is it the correct usage? > > Yes, rte_atomic_thread_fence(__ATOMIC_ACQUIRE) is the correct code to > > replace 'rte_smp_rmb()'. > > > > However, I took a look at the code and it is not clear to me if the > barrier is > > required or if it is in the correct place. > > >=20 > Thanks for guidance. >=20 > I want to add the barrier at the time before reading descriptors in Rx sc= an, to > synchronize with the hardware. > Actually I don't really understand the usage of this function. > Could you please tell me more details? Looking at the code again, qw0 should not be read before checking the statu= s of the descriptors. So, barrier is required. But, I think the barrier can be moved down after the for loop that computes= the number of status bits set. >=20 >=20