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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR08MB4686 Subject: Re: [dpdk-dev] [PATCH v2] lib/timer: relax barrier for status update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Erik, > Subject: [PATCH v2] lib/timer: relax barrier for status update >=20 > Volatile has no ordering semantics. The rte_timer structure defines timer > status as a volatile variable and uses the rte_r/wmb barrier to guarantee > inter-thread visibility. >=20 > This patch optimized the volatile operation with c11 atomic operations an= d > one-way barrier to save the performance penalty. According to the > timer_perf_autotest benchmarking results, this patch can uplift 10%~16% > timer appending performance, 3%~20% timer resetting performance and 45% > timer callbacks scheduling performance on aarch64 and no loss in > performance for x86. >=20 > Suggested-by: Honnappa Nagarahalli > Signed-off-by: Phil Yang > Reviewed-by: Gavin Hu >=20 > --- > This patch depends on patch: > http://patchwork.dpdk.org/patch/65997/ >=20 > v2: > 1. Changed the memory ordering comment in timer_set_config_state. > 2. It is still using built-ins as the wrapper functions for C11 built-ins= are not > defined yet. It is too late to get the wrapper functions done for 20.05. It was decided = in yesterday's tech board meeting to go ahead with C11 atomic built-ins (si= nce there is lot of code in DPDK that uses C11 built-ins). If there are no = further comments, can you please provide your ack? >=20 > lib/librte_timer/rte_timer.c | 85 ++++++++++++++++++++++++++++++--------= --- > --- > lib/librte_timer/rte_timer.h | 2 +- > 2 files changed, 60 insertions(+), 27 deletions(-) >=20 > diff --git a/lib/librte_timer/rte_timer.c b/lib/librte_timer/rte_timer.c = index > 269e921..ba17216 100644 > --- a/lib/librte_timer/rte_timer.c > +++ b/lib/librte_timer/rte_timer.c > @@ -10,7 +10,6 @@ > #include > #include >=20 > -#include > #include > #include > #include > @@ -218,7 +217,7 @@ rte_timer_init(struct rte_timer *tim) >=20 > status.state =3D RTE_TIMER_STOP; > status.owner =3D RTE_TIMER_NO_OWNER; > - tim->status.u32 =3D status.u32; > + __atomic_store_n(&tim->status.u32, status.u32, > __ATOMIC_RELAXED); > } >=20 > /* > @@ -239,9 +238,9 @@ timer_set_config_state(struct rte_timer *tim, >=20 > /* wait that the timer is in correct status before update, > * and mark it as being configured */ > - while (success =3D=3D 0) { > - prev_status.u32 =3D tim->status.u32; > + prev_status.u32 =3D __atomic_load_n(&tim->status.u32, > __ATOMIC_RELAXED); >=20 > + while (success =3D=3D 0) { > /* timer is running on another core > * or ready to run on local core, exit > */ > @@ -258,9 +257,15 @@ timer_set_config_state(struct rte_timer *tim, > * mark it atomically as being configured */ > status.state =3D RTE_TIMER_CONFIG; > status.owner =3D (int16_t)lcore_id; > - success =3D rte_atomic32_cmpset(&tim->status.u32, > - prev_status.u32, > - status.u32); > + /* CONFIG states are acting as locked states. If the > + * timer is in CONFIG state, the state cannot be changed > + * by other threads. So, we should use ACQUIRE here. > + */ > + success =3D __atomic_compare_exchange_n(&tim->status.u32, > + &prev_status.u32, > + status.u32, 0, > + __ATOMIC_ACQUIRE, > + __ATOMIC_RELAXED); > } >=20 > ret_prev_status->u32 =3D prev_status.u32; @@ -279,20 +284,27 @@ > timer_set_running_state(struct rte_timer *tim) >=20 > /* wait that the timer is in correct status before update, > * and mark it as running */ > - while (success =3D=3D 0) { > - prev_status.u32 =3D tim->status.u32; > + prev_status.u32 =3D __atomic_load_n(&tim->status.u32, > __ATOMIC_RELAXED); >=20 > + while (success =3D=3D 0) { > /* timer is not pending anymore */ > if (prev_status.state !=3D RTE_TIMER_PENDING) > return -1; >=20 > /* here, we know that timer is stopped or pending, > - * mark it atomically as being configured */ > + * mark it atomically as being running > + */ > status.state =3D RTE_TIMER_RUNNING; > status.owner =3D (int16_t)lcore_id; > - success =3D rte_atomic32_cmpset(&tim->status.u32, > - prev_status.u32, > - status.u32); > + /* RUNNING states are acting as locked states. If the > + * timer is in RUNNING state, the state cannot be changed > + * by other threads. So, we should use ACQUIRE here. > + */ > + success =3D __atomic_compare_exchange_n(&tim->status.u32, > + &prev_status.u32, > + status.u32, 0, > + __ATOMIC_ACQUIRE, > + __ATOMIC_RELAXED); > } >=20 > return 0; > @@ -520,10 +532,12 @@ __rte_timer_reset(struct rte_timer *tim, uint64_t > expire, >=20 > /* update state: as we are in CONFIG state, only us can modify > * the state so we don't need to use cmpset() here */ > - rte_wmb(); > status.state =3D RTE_TIMER_PENDING; > status.owner =3D (int16_t)tim_lcore; > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory operations above > + * the status update are observed before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, __ATOMIC_RELEASE); >=20 > if (tim_lcore !=3D lcore_id || !local_is_locked) > rte_spinlock_unlock(&priv_timer[tim_lcore].list_lock); > @@ -600,10 +614,12 @@ __rte_timer_stop(struct rte_timer *tim, int > local_is_locked, > } >=20 > /* mark timer as stopped */ > - rte_wmb(); > status.state =3D RTE_TIMER_STOP; > status.owner =3D RTE_TIMER_NO_OWNER; > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory operations above > + * the status update are observed before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, __ATOMIC_RELEASE); >=20 > return 0; > } > @@ -637,7 +653,8 @@ rte_timer_stop_sync(struct rte_timer *tim) int > rte_timer_pending(struct rte_timer *tim) { > - return tim->status.state =3D=3D RTE_TIMER_PENDING; > + return __atomic_load_n(&tim->status.state, > + __ATOMIC_RELAXED) =3D=3D > RTE_TIMER_PENDING; > } >=20 > /* must be called periodically, run all timer that expired */ @@ -739,8 > +756,12 @@ __rte_timer_manage(struct rte_timer_data *timer_data) > /* remove from done list and mark timer as stopped > */ > status.state =3D RTE_TIMER_STOP; > status.owner =3D RTE_TIMER_NO_OWNER; > - rte_wmb(); > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory > + * operations above the status update are observed > + * before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, > + __ATOMIC_RELEASE); > } > else { > /* keep it in list and mark timer as pending */ @@ - > 748,8 +769,12 @@ __rte_timer_manage(struct rte_timer_data *timer_data) > status.state =3D RTE_TIMER_PENDING; > __TIMER_STAT_ADD(priv_timer, pending, 1); > status.owner =3D (int16_t)lcore_id; > - rte_wmb(); > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory > + * operations above the status update are observed > + * before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, > + __ATOMIC_RELEASE); > __rte_timer_reset(tim, tim->expire + tim->period, > tim->period, lcore_id, tim->f, tim->arg, 1, > timer_data); > @@ -919,8 +944,12 @@ rte_timer_alt_manage(uint32_t timer_data_id, > /* remove from done list and mark timer as stopped > */ > status.state =3D RTE_TIMER_STOP; > status.owner =3D RTE_TIMER_NO_OWNER; > - rte_wmb(); > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory > + * operations above the status update are observed > + * before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, > + __ATOMIC_RELEASE); > } else { > /* keep it in list and mark timer as pending */ > rte_spinlock_lock( > @@ -928,8 +957,12 @@ rte_timer_alt_manage(uint32_t timer_data_id, > status.state =3D RTE_TIMER_PENDING; > __TIMER_STAT_ADD(data->priv_timer, pending, 1); > status.owner =3D (int16_t)this_lcore; > - rte_wmb(); > - tim->status.u32 =3D status.u32; > + /* The "RELEASE" ordering guarantees the memory > + * operations above the status update are observed > + * before the update by all threads > + */ > + __atomic_store_n(&tim->status.u32, status.u32, > + __ATOMIC_RELEASE); > __rte_timer_reset(tim, tim->expire + tim->period, > tim->period, this_lcore, tim->f, tim->arg, 1, > data); > diff --git a/lib/librte_timer/rte_timer.h b/lib/librte_timer/rte_timer.h = index > c6b3d45..df533fa 100644 > --- a/lib/librte_timer/rte_timer.h > +++ b/lib/librte_timer/rte_timer.h > @@ -101,7 +101,7 @@ struct rte_timer > { > uint64_t expire; /**< Time when timer expire. */ > struct rte_timer *sl_next[MAX_SKIPLIST_DEPTH]; > - volatile union rte_timer_status status; /**< Status of timer. */ > + union rte_timer_status status; /**< Status of timer. */ > uint64_t period; /**< Period of timer (0 if not periodic). */ > rte_timer_cb_t f; /**< Callback function. */ > void *arg; /**< Argument to callback function. */ > -- > 2.7.4