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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB4376 Subject: Re: [dpdk-dev] [PATCH v3 5/9] ring: introduce HTS ring mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Konstantin, Few nits/comments inline. > diff --git a/lib/librte_ring/rte_ring_hts.h b/lib/librte_ring/rte_ring_ht= s.h new > file mode 100644 index 000000000..062d7be6c > --- /dev/null > +++ b/lib/librte_ring/rte_ring_hts.h > @@ -0,0 +1,210 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * > + * Copyright (c) 2010-2017 Intel Corporation > + * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org > + * All rights reserved. > + * Derived from FreeBSD's bufring.h > + * Used as BSD-3 Licensed with permission from Kip Macy. > + */ > + > +#ifndef _RTE_RING_HTS_H_ > +#define _RTE_RING_HTS_H_ > + > +/** > + * @file rte_ring_hts.h > + * @b EXPERIMENTAL: this API may change without prior notice > + * It is not recommended to include this file directly. > + * Please include instead. > + * > + * Contains functions for serialized, aka Head-Tail Sync (HTS) ring mode= . > + * In that mode enqueue/dequeue operation is fully serialized: > + * at any given moement only one enqueue/dequeue operation can proceed. ^^^^^^^^ moment > + * This is achieved by thread is allowed to proceed with changing ^^^^^^^^^^^^^^ allowing a threa= d > +head.value > + * only when head.value =3D=3D tail.value. > + * Both head and tail values are updated atomically (as one 64-bit value= ). > + * To achieve that 64-bit CAS is used by head update routine. > + */ > + > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +#include > + > diff --git a/lib/librte_ring/rte_ring_hts_generic.h > b/lib/librte_ring/rte_ring_hts_generic.h > new file mode 100644 > index 000000000..da08f1d94 > --- /dev/null > +++ b/lib/librte_ring/rte_ring_hts_generic.h > @@ -0,0 +1,198 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * > + * Copyright (c) 2010-2020 Intel Corporation > + * Copyright (c) 2007-2009 Kip Macy kmacy@freebsd.org > + * All rights reserved. > + * Derived from FreeBSD's bufring.h > + * Used as BSD-3 Licensed with permission from Kip Macy. > + */ > + > +#ifndef _RTE_RING_HTS_GENERIC_H_ > +#define _RTE_RING_HTS_GENERIC_H_ > + > +/** > + * @file rte_ring_hts_generic.h > + * It is not recommended to include this file directly, > + * include instead. > + * Contains internal helper functions for head/tail sync (HTS) ring mode= . > + * For more information please refer to . > + */ > + > +static __rte_always_inline void > +__rte_ring_hts_update_tail(struct rte_ring_hts_headtail *ht, uint32_t nu= m, > + uint32_t enqueue) > +{ > + union rte_ring_ht_pos p; > + > + if (enqueue) > + rte_smp_wmb(); > + else > + rte_smp_rmb(); > + > + p.raw =3D rte_atomic64_read((rte_atomic64_t *)(uintptr_t)&ht- > >ht.raw); This read can be avoided if the new head can be returned from '__rte_ring_h= ts_head_wait'. > + > + p.pos.head =3D p.pos.tail + num; > + p.pos.tail =3D p.pos.head; > + > + rte_atomic64_set((rte_atomic64_t *)(uintptr_t)&ht->ht.raw, p.raw); } Why not use 32b atomic operation here and update just the tail? > + > +/** > + * @internal waits till tail will become equal to head. > + * Means no writer/reader is active for that ring. > + * Suppose to work as serialization point. > + */ > +static __rte_always_inline void > +__rte_ring_hts_head_wait(const struct rte_ring_hts_headtail *ht, > + union rte_ring_ht_pos *p) > +{ > + p->raw =3D rte_atomic64_read((rte_atomic64_t *) > + (uintptr_t)&ht->ht.raw); > + > + while (p->pos.head !=3D p->pos.tail) { > + rte_pause(); > + p->raw =3D rte_atomic64_read((rte_atomic64_t *) > + (uintptr_t)&ht->ht.raw); > + } > +} > + > +/** > + * @internal This function updates the producer head for enqueue > + * > + * @param r > + * A pointer to the ring structure > + * @param is_sp > + * Indicates whether multi-producer path is needed or not > + * @param n > + * The number of elements we will want to enqueue, i.e. how far should= the > + * head be moved > + * @param behavior > + * RTE_RING_QUEUE_FIXED: Enqueue a fixed number of items from a rin= g > + * RTE_RING_QUEUE_VARIABLE: Enqueue as many items as possible from > ring > + * @param old_head > + * Returns head value as it was before the move, i.e. where enqueue st= arts > + * @param new_head > + * Returns the current/new head value i.e. where enqueue finishes Would be good to return the new_head from this function and use it in '__rt= e_ring_hts_update_tail'. > + * @param free_entries > + * Returns the amount of free space in the ring BEFORE head was moved > + * @return > + * Actual number of objects enqueued. > + * If behavior =3D=3D RTE_RING_QUEUE_FIXED, this will be 0 or n only. > + */ Minor, suggest removing the elaborate comments, it is not required and diff= icult to maintain. I think we should do the same thing for other files too. > +static __rte_always_inline unsigned int > +__rte_ring_hts_move_prod_head(struct rte_ring *r, unsigned int num, > + enum rte_ring_queue_behavior behavior, uint32_t *old_head, > + uint32_t *free_entries) > +{ > + uint32_t n; > + union rte_ring_ht_pos np, op; > + > + const uint32_t capacity =3D r->capacity; > + > + do { > + /* Reset n to the initial burst count */ > + n =3D num; > + > + /* wait for tail to be equal to head */ > + __rte_ring_hts_head_wait(&r->hts_prod, &op); > + > + /* add rmb barrier to avoid load/load reorder in weak > + * memory model. It is noop on x86 > + */ > + rte_smp_rmb(); > + > + /* > + * The subtraction is done between two unsigned 32bits > value > + * (the result is always modulo 32 bits even if we have > + * *old_head > cons_tail). So 'free_entries' is always between > 0 > + * and capacity (which is < size). > + */ > + *free_entries =3D capacity + r->cons.tail - op.pos.head; > + > + /* check that we have enough room in ring */ > + if (unlikely(n > *free_entries)) > + n =3D (behavior =3D=3D RTE_RING_QUEUE_FIXED) ? > + 0 : *free_entries; > + > + if (n =3D=3D 0) > + break; > + > + np.pos.tail =3D op.pos.tail; > + np.pos.head =3D op.pos.head + n; > + > + } while (rte_atomic64_cmpset(&r->hts_prod.ht.raw, > + op.raw, np.raw) =3D=3D 0); I think we can use 32b atomic operation here and just update the head. > + > + *old_head =3D op.pos.head; > + return n; > +} > + > +/** > + * @internal This function updates the consumer head for dequeue > + * > + * @param r > + * A pointer to the ring structure > + * @param is_sc > + * Indicates whether multi-consumer path is needed or not > + * @param n > + * The number of elements we will want to enqueue, i.e. how far should= the > + * head be moved > + * @param behavior > + * RTE_RING_QUEUE_FIXED: Dequeue a fixed number of items from a > ring > + * RTE_RING_QUEUE_VARIABLE: Dequeue as many items as possible from > ring > + * @param old_head > + * Returns head value as it was before the move, i.e. where dequeue st= arts > + * @param new_head > + * Returns the current/new head value i.e. where dequeue finishes > + * @param entries > + * Returns the number of entries in the ring BEFORE head was moved > + * @return > + * - Actual number of objects dequeued. > + * If behavior =3D=3D RTE_RING_QUEUE_FIXED, this will be 0 or n only= . > + */ > +static __rte_always_inline unsigned int > +__rte_ring_hts_move_cons_head(struct rte_ring *r, unsigned int num, > + enum rte_ring_queue_behavior behavior, uint32_t *old_head, > + uint32_t *entries) > +{ > + uint32_t n; > + union rte_ring_ht_pos np, op; > + > + /* move cons.head atomically */ > + do { > + /* Restore n as it may change every loop */ > + n =3D num; > + > + /* wait for tail to be equal to head */ > + __rte_ring_hts_head_wait(&r->hts_cons, &op); > + > + /* add rmb barrier to avoid load/load reorder in weak > + * memory model. It is noop on x86 > + */ > + rte_smp_rmb(); > + > + /* The subtraction is done between two unsigned 32bits value > + * (the result is always modulo 32 bits even if we have > + * cons_head > prod_tail). So 'entries' is always between 0 > + * and size(ring)-1. > + */ > + *entries =3D r->prod.tail - op.pos.head; > + > + /* Set the actual entries for dequeue */ > + if (n > *entries) > + n =3D (behavior =3D=3D RTE_RING_QUEUE_FIXED) ? 0 : > *entries; > + > + if (unlikely(n =3D=3D 0)) > + break; > + > + np.pos.tail =3D op.pos.tail; > + np.pos.head =3D op.pos.head + n; > + > + } while (rte_atomic64_cmpset(&r->hts_cons.ht.raw, > + op.raw, np.raw) =3D=3D 0); > + > + *old_head =3D op.pos.head; > + return n; > +} > + > +#endif /* _RTE_RING_HTS_GENERIC_H_ */ > -- > 2.17.1