From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <mark.b.kavanagh@intel.com>
Received: from mga03.intel.com (mga03.intel.com [134.134.136.65])
 by dpdk.org (Postfix) with ESMTP id 36F4C5A3E
 for <dev@dpdk.org>; Wed, 15 Apr 2015 18:09:27 +0200 (CEST)
Received: from fmsmga003.fm.intel.com ([10.253.24.29])
 by orsmga103.jf.intel.com with ESMTP; 15 Apr 2015 09:09:26 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.11,582,1422950400"; d="scan'208";a="481292506"
Received: from irsmsx109.ger.corp.intel.com ([163.33.3.23])
 by FMSMGA003.fm.intel.com with ESMTP; 15 Apr 2015 09:09:25 -0700
Received: from irsmsx105.ger.corp.intel.com ([169.254.7.2]) by
 IRSMSX109.ger.corp.intel.com ([169.254.13.95]) with mapi id 14.03.0224.002;
 Wed, 15 Apr 2015 17:09:24 +0100
From: "Kavanagh, Mark B" <mark.b.kavanagh@intel.com>
To: "Richardson, Bruce" <bruce.richardson@intel.com>
Thread-Topic: [dpdk-dev] Minimum Supported x86 microarchitecture
Thread-Index: AdB3jTKY7vK6E6MCTEmtvngTL0yxgQAAGiCAAAI6xAA=
Date: Wed, 15 Apr 2015 16:09:23 +0000
Message-ID: <DC5AD7FA266D86499789B1BCAEC715F846DA65AA@irsmsx105.ger.corp.intel.com>
References: <DC5AD7FA266D86499789B1BCAEC715F846DA64E3@irsmsx105.ger.corp.intel.com>
 <20150415160527.GA9836@bricha3-MOBL3>
In-Reply-To: <20150415160527.GA9836@bricha3-MOBL3>
Accept-Language: en-IE, en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-originating-ip: [163.33.239.180]
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] Minimum Supported x86 microarchitecture
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: patches and discussions about DPDK <dev.dpdk.org>
List-Unsubscribe: <http://dpdk.org/ml/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <http://dpdk.org/ml/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Wed, 15 Apr 2015 16:09:27 -0000



>-----Original Message-----
>From: Richardson, Bruce
>Sent: Wednesday, April 15, 2015 5:05 PM
>To: Kavanagh, Mark B
>Cc: dev@dpdk.org
>Subject: Re: [dpdk-dev] Minimum Supported x86 microarchitecture
>
>On Wed, Apr 15, 2015 at 03:09:39PM +0000, Kavanagh, Mark B wrote:
>> Hi,
>>
>> The recent reimplementation of rte_memcpy in DPDK v2.0.0 seems to have a=
 placed an
>implicit floor on the microarchitecture/Instruction set supported by DPDK.
>>
>> For example, I can't compile head of OVS against DPDK 2.0 with gcc witho=
ut passing the
>'msse3' flag; this points to an implicit minimum  supported CPU of 'core2'=
. More
>discussion on same is available here: http://openvswitch.org/pipermail/dev=
/2015-
>April/053523.html
>>
>> Can anyone confirm or deny this, and is/should it be documented?
>>
>> Thanks in advance,
>> Mark
>
>SSE3 is the minimum necessary. However, I believe all x86_64 cpus have at =
least
>SSE3 support, so this should only be a problem with 32-bit builds. Is this=
 the
>case for you?
>
>/Bruce

Hey Bruce,

No, I'm compiling on an IVB system.