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[2a01:cb00:21e:c000:2fb5:ec50:e5a7:75d4]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45df81e4563sm968395e9.7.2025.09.09.13.40.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 Sep 2025 13:40:51 -0700 (PDT) Mime-Version: 1.0 Date: Tue, 09 Sep 2025 22:40:50 +0200 Message-Id: From: "Robin Jarry" To: "Burakov, Anatoly" , Subject: Re: Error with --no-huge when compiled with -fsanitize=address from gcc 15 User-Agent: aerc/0.21.0-2-g47ed279078d2 References: <9d2e0536-98af-4532-aa57-dd1605d6e070@intel.com> <45a59471-a515-4595-bf07-a74d1c6e8482@intel.com> In-Reply-To: <45a59471-a515-4595-bf07-a74d1c6e8482@intel.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: rARiZyq-QY_vkPZI2NqriXnQEKHRu_eSy5xQ10IC60I_1757450452 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Anatoly, Burakov, Anatoly, Sep 05, 2025 at 11:17: > Specifically, it's weird that your DMA width is 42 bits (indicated by=20 > "using dma mask fffffc0000000000" log), running on a physical machine -= =20 > mine sits at 57 bits, so despite having VA's within the same range as=20 > yours, this works on my machine because my DMA mask is much wider. Maybe= =20 > there's a kernel command-line of some sort that limits your DMA width? > > At first glance I don't think the issue has anything to do with DPDK, at= =20 > least it doesn't look like it does to me. I do not see how DMA mask=20 > width would be affected by libasan or GCC15, to me it sounds more like a= =20 > kernel configuration/HW setup problem. NB: The problem *only* appears when I compile with -fsanitize=3Daddress. Hence my suspicion around GCC/libasan. There must be something done by ASAN that changes the address space. Digging further with your advice (and some help from AI...), I found that the DMA width (42 bits) as reported by EAL debug logs actually come from my laptop having a new "security feature" enabled in the BIOS: =09Kernel DMA Protection When this "feature" is enabled, IOMMU is forced-on during early boot: =09DMAR: Intel-IOMMU force enabled due to platform opt in Also, my IOMMU exposes a limited DMA width (I don't know why). My CPU model is: =09Intel(R) Core(TM) Ultra 7 165U I have disabled DMA protection in the BIOS, and the problem is now gone. Interestingly, whenever I explicitly enable IOMMU in the kernel boot arguments (iommu=3Dpt intel_iommu=3Don), the issue manifests itself again. This is therefore a weird interaction between ASAN, the IOMMU on my laptop and DPDK memory initialization. Anyway, sorry for the noise. Maybe, my experience may be useful to others :) Thanks for your assistance! --=20 Robin > Will stain.