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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5518.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f3057a82-defd-4a2f-6627-08d9822f0689 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Sep 2021 03:21:13.3859 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Qhr2IqBUtoIr8XljiGAbE32wrV8yAWwaHvCZg8bausy3O/jndBIWev4MGzW7/4/+UqbCkaJxKXhe6u9akgUbfA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1101MB2139 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH] net/ixgbe: fix RxQ/TxQ release X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Wang, Haiyue > Sent: Tuesday, September 28, 2021 11:06 > To: 'Julien Meunier' ; dev@dpdk.org > Cc: stable@dpdk.org; Richardson, Bruce > Subject: RE: [PATCH] net/ixgbe: fix RxQ/TxQ release >=20 > > -----Original Message----- > > From: Julien Meunier > > Sent: Tuesday, September 28, 2021 01:18 > > To: dev@dpdk.org > > Cc: stable@dpdk.org; Richardson, Bruce ; Wa= ng, Haiyue > > > > Subject: [PATCH] net/ixgbe: fix RxQ/TxQ release > > > > On the vector implementation, during the tear-down, the mbufs not > > drained in the RxQ and TxQ are freed based on an algorithm which > > supposed that the number of descriptors is a power of 2 (max_desc). > > Based on this hypothesis, this algorithm uses a bitmask in order to > > detect an index overflow during the iteration, and to restart the loop > > from 0. > > > > However, there is no such power of 2 requirement in the ixgbe for the > > number of descriptors in the RxQ / TxQ. The only requirement is to have > > a number correctly aligned. > > > > If a user requested to configure a number of descriptors which is not a > > power of 2, as a consequence, during the tear-down, it was possible to > > be in an infinite loop, and to never reach the exit loop condition. > > >=20 > Are you able to setup not a power of 2 successfully ? >=20 My fault, yes, possible. ;-) > int > rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, > uint16_t nb_tx_desc, unsigned int socket_id, > const struct rte_eth_txconf *tx_conf) > { > ... >=20 > if (nb_tx_desc > dev_info.tx_desc_lim.nb_max || > nb_tx_desc < dev_info.tx_desc_lim.nb_min || > nb_tx_desc % dev_info.tx_desc_lim.nb_align !=3D 0) { > RTE_ETHDEV_LOG(ERR, > "Invalid value for nb_tx_desc(=3D%hu), should be: <=3D %hu, >=3D %hu, = and a product > of %hu\n", > nb_tx_desc, dev_info.tx_desc_lim.nb_max, > dev_info.tx_desc_lim.nb_min, > dev_info.tx_desc_lim.nb_align); > return -EINVAL; > } >=20 > ... >=20 > } >=20 > > By removing the bitmask and changing the loop method, we can avoid this > > issue, and allow the user to configure a RxQ / TxQ which is not a power > > of 2. > > > > Fixes: c95584dc2b18 ("ixgbe: new vectorized functions for Rx/Tx") > > Cc: bruce.richardson@intel.com > > Cc: stable@dpdk.org > > > > Signed-off-by: Julien Meunier > > --- > > drivers/net/ixgbe/ixgbe_rxtx_vec_common.h | 20 +++++++++++++------- > > 1 file changed, 13 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_common.h b/drivers/net/ix= gbe/ixgbe_rxtx_vec_common.h > > index adba855ca3..8912558918 100644 > > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_common.h > > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_common.h > > @@ -150,11 +150,14 @@ _ixgbe_tx_queue_release_mbufs_vec(struct ixgbe_tx= _queue *txq) > > return; > > Just one line ? i =3D (i + 1) % txq->nb_tx_desc > > /* release the used mbufs in sw_ring */ > > - for (i =3D txq->tx_next_dd - (txq->tx_rs_thresh - 1); > > - i !=3D txq->tx_tail; > > - i =3D (i + 1) & max_desc) { > > + i =3D txq->tx_next_dd - (txq->tx_rs_thresh - 1); > > + while (i !=3D txq->tx_tail) { > > txe =3D &txq->sw_ring_v[i]; > > rte_pktmbuf_free_seg(txe->mbuf); > > + > > + i =3D i + 1; > > + if (i > max_desc) > > + i =3D 0; > > } > > txq->nb_tx_free =3D max_desc; > > > > @@ -168,7 +171,7 @@ _ixgbe_tx_queue_release_mbufs_vec(struct ixgbe_tx_q= ueue *txq) > > static inline void > > _ixgbe_rx_queue_release_mbufs_vec(struct ixgbe_rx_queue *rxq) > > { > > - const unsigned int mask =3D rxq->nb_rx_desc - 1; > > + const unsigned int max_desc =3D rxq->nb_rx_desc - 1; > > unsigned int i; > > > > if (rxq->sw_ring =3D=3D NULL || rxq->rxrearm_nb >=3D rxq->nb_rx_desc) > > @@ -181,11 +184,14 @@ _ixgbe_rx_queue_release_mbufs_vec(struct ixgbe_rx= _queue *rxq) > > rte_pktmbuf_free_seg(rxq->sw_ring[i].mbuf); > > } > > } else { > > - for (i =3D rxq->rx_tail; > > - i !=3D rxq->rxrearm_start; > > - i =3D (i + 1) & mask) { > > + i =3D rxq->rx_tail; > > + while (i !=3D rxq->rxrearm_start) { > > if (rxq->sw_ring[i].mbuf !=3D NULL) > > rte_pktmbuf_free_seg(rxq->sw_ring[i].mbuf); > > + > > + i =3D i + 1; > > + if (i > max_desc) > > + i =3D 0; > > } > > } > > > > -- > > 2.17.1