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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5994.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e0ded43b-b35e-4432-53f9-08dadcae4c2f X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Dec 2022 02:03:58.6468 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 3fZyJ5uiTZx115O/AiB1wsXbRnhrC4y4gFqmD1DuIFmu+SmFKByXmkwZQh+n1UoUsycKwaabO3KEkCnMCoX98w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR11MB6099 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zhang, Ke1X > Sent: Friday, November 25, 2022 10:51 AM > To: Zhang, Qi Z ; Zhang, Yuying > ; dev@dpdk.org > Cc: Zhang, Ke1X > Subject: [PATCH] net/ice: add devargs for disabling mac filter >=20 > From: "ke1x.zhang" >=20 > This patch adds support to disable mac filter which will be used by ice d= river > when setting dpdk_devargs config field in the TRex config file. >=20 > Mac filter is not disabled in default. >=20 > Signed-off-by: ke1x.zhang > --- > drivers/net/ice/ice_ethdev.c | 13 +++++++++++++ > drivers/net/ice/ice_ethdev.h | 1 + > drivers/net/ice/ice_generic_flow.c | 15 +++++++++++++++ > 3 files changed, 29 insertions(+) >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > 0bc739daf0..0c9f66eb88 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -28,6 +28,7 @@ > /* devargs */ > #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support" > #define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support" > +#define ICE_MAC_FILTER_DISABLE "mac-filter-disable" Document also need to be updated for the new devargs. > #define ICE_PROTO_XTR_ARG "proto_xtr" > #define ICE_FIELD_OFFS_ARG "field_offs" > #define ICE_FIELD_NAME_ARG "field_name" > @@ -49,6 +50,7 @@ static const char * const ice_valid_args[] =3D { > ICE_HW_DEBUG_MASK_ARG, > ICE_ONE_PPS_OUT_ARG, > ICE_RX_LOW_LATENCY_ARG, > + ICE_MAC_FILTER_DISABLE, > NULL > }; >=20 > @@ -962,8 +964,13 @@ ice_add_mac_filter(struct ice_vsi *vsi, struct > rte_ether_addr *mac_addr) > struct ice_mac_filter *f; > struct LIST_HEAD_TYPE list_head; > struct ice_hw *hw =3D ICE_VSI_TO_HW(vsi); > + struct ice_adapter *ad =3D (struct ice_adapter *)hw->back; > int ret =3D 0; >=20 > + if (ad->devargs.mac_filter_disable =3D=3D 1) { > + PMD_DRV_LOG(ERR, "This MAC filter is disabled."); > + return 0; > + } > /* If it's added and configured, return */ > f =3D ice_find_mac_filter(vsi, mac_addr); > if (f) { > @@ -2075,6 +2082,11 @@ static int ice_parse_devargs(struct rte_eth_dev > *dev) > if (ret) > goto bail; >=20 > + ret =3D rte_kvargs_process(kvlist, ICE_MAC_FILTER_DISABLE, > + &parse_bool, &ad- > >devargs.mac_filter_disable); > + if (ret) > + goto bail; > + > ret =3D rte_kvargs_process(kvlist, ICE_HW_DEBUG_MASK_ARG, > &parse_u64, &ad->hw.debug_mask); > if (ret) > @@ -6050,6 +6062,7 @@ RTE_PMD_REGISTER_PARAM_STRING(net_ice, > ICE_PROTO_XTR_ARG > "=3D[queue:]" > ICE_SAFE_MODE_SUPPORT_ARG "=3D<0|1>" > ICE_PIPELINE_MODE_SUPPORT_ARG "=3D<0|1>" > + ICE_MAC_FILTER_DISABLE "=3D<0|1>" > ICE_RX_LOW_LATENCY_ARG "=3D<0|1>"); >=20 > RTE_LOG_REGISTER_SUFFIX(ice_logtype_init, init, NOTICE); diff --git > a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h index > c8311be179..0350c6584a 100644 > --- a/drivers/net/ice/ice_ethdev.h > +++ b/drivers/net/ice/ice_ethdev.h > @@ -563,6 +563,7 @@ struct ice_devargs { > int safe_mode_support; > uint8_t proto_xtr_dflt; > int pipe_mode_support; > + int mac_filter_disable; > uint8_t proto_xtr[ICE_MAX_QUEUE_NUM]; > uint8_t pin_idx; > uint8_t pps_out_ena; > diff --git a/drivers/net/ice/ice_generic_flow.c > b/drivers/net/ice/ice_generic_flow.c > index d496c28dec..bca38f5a52 100644 > --- a/drivers/net/ice/ice_generic_flow.c > +++ b/drivers/net/ice/ice_generic_flow.c > @@ -2464,6 +2464,8 @@ ice_flow_create(struct rte_eth_dev *dev, > struct rte_flow_error *error) > { > struct ice_pf *pf =3D ICE_DEV_PRIVATE_TO_PF(dev->data- > >dev_private); > + struct ice_adapter *ad =3D > + ICE_DEV_PRIVATE_TO_ADAPTER(dev->data- > >dev_private); > struct rte_flow *flow =3D NULL; > int ret; > struct ice_flow_engine *engine =3D NULL; @@ -2476,6 +2478,14 @@ > ice_flow_create(struct rte_eth_dev *dev, > return flow; > } >=20 > + if (ad->devargs.mac_filter_disable =3D=3D 1) { > + if ((pattern[0].type =3D=3D RTE_FLOW_ITEM_TYPE_ANY) > + && (actions[0].type =3D=3D > RTE_FLOW_ACTION_TYPE_DROP)) { > + flow->rule =3D NULL; > + return flow; > + } > + } > + > rte_spinlock_lock(&pf->flow_ops_lock); >=20 > ret =3D ice_flow_process_filter(dev, flow, attr, pattern, actions, @@ - > 2506,6 +2516,11 @@ ice_flow_destroy(struct rte_eth_dev *dev, > ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); > int ret =3D 0; >=20 > + if ((ad->devargs.mac_filter_disable =3D=3D 1) > + && (flow->rule =3D=3D NULL)) { > + return 0; > + } > + > if (!flow || !flow->engine || !flow->engine->destroy) { > rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_HANDLE, > -- > 2.34.1